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Merge pull request #3560 from bylaws/ec-pt6

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FEXCore: Support x64 -> arm64ec calls
This commit is contained in:
Ryan Houdek 2024-04-09 07:08:38 -07:00 committed by GitHub
commit 1a8b61b9fc
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GPG Key ID: B5690EEEBB952194
16 changed files with 803 additions and 774 deletions
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19
FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.cpp
View File

@ -61,6 +61,9 @@ void Dispatcher::EmitDispatcher() {
ARMEmitter::ForwardLabel l_CTX;
ARMEmitter::SingleUseForwardLabel l_Sleep;
#ifdef _M_ARM_64EC
ARMEmitter::SingleUseForwardLabel ExitEC;
#endif
ARMEmitter::SingleUseForwardLabel l_CompileBlock;
// Push all the register we need to save
@ -91,7 +94,8 @@ void Dispatcher::EmitDispatcher() {
// Load in our RIP
// Don't modify TMP3 since it contains our RIP once the block doesn't exist
// IMPORTANT: Pointers.Common.ExitFunctionEC callsites/implementations need to be
// adjusted accordingly if this changes.
auto RipReg = TMP3;
ldr(RipReg, STATE_PTR(CpuStateFrame, State.rip));
@ -134,6 +138,10 @@ void Dispatcher::EmitDispatcher() {
// If page pointer is zero then we have no block
cbz(ARMEmitter::Size::i64Bit, TMP1, &NoBlock);
#ifdef _M_ARM_64EC
// The LSB of an L2 page entry indicates if this page contains EC code
tbnz(TMP1, 0, &ExitEC);
#endif
// Steal the page offset
and_(ARMEmitter::Size::i64Bit, TMP2, TMP4, 0x0FFF);
@ -167,6 +175,15 @@ void Dispatcher::EmitDispatcher() {
}
}
#ifdef _M_ARM_64EC
{
Bind(&ExitEC);
// Target PC is already loaded into TMP3 at the start of the dispatcher
ldr(TMP2, STATE_PTR(CpuStateFrame, Pointers.Common.ExitFunctionEC));
br(TMP2);
}
#endif
{
ThreadStopHandlerAddressSpillSRA = GetCursorAddress<uint64_t>();
SpillStaticRegs(TMP1);

23
FEXCore/Source/Interface/Core/JIT/Arm64/BranchOps.cpp
View File

@ -53,14 +53,23 @@ DEF_OP(ExitFunction) {
uint64_t NewRIP;
if (IsInlineConstant(Op->NewRIP, &NewRIP) || IsInlineEntrypointOffset(Op->NewRIP, &NewRIP)) {
ARMEmitter::SingleUseForwardLabel l_BranchHost;
#ifdef _M_ARM_64EC
if (RtlIsEcCode(NewRIP)) {
LoadConstant(ARMEmitter::Size::i64Bit, TMP3, NewRIP);
ldr(TMP2, STATE_PTR(CpuStateFrame, Pointers.Common.ExitFunctionEC));
br(TMP2);
} else {
#endif
ARMEmitter::SingleUseForwardLabel l_BranchHost;
ldr(TMP1, &l_BranchHost);
blr(TMP1);
ldr(TMP1, &l_BranchHost);
blr(TMP1);
Bind(&l_BranchHost);
dc64(ThreadState->CurrentFrame->Pointers.Common.ExitFunctionLinker);
dc64(NewRIP);
Bind(&l_BranchHost);
dc64(ThreadState->CurrentFrame->Pointers.Common.ExitFunctionLinker);
dc64(NewRIP);
#ifdef _M_ARM_64EC
}
#endif
} else {
ARMEmitter::SingleUseForwardLabel FullLookup;

3
FEXCore/include/FEXCore/Core/CoreState.h
View File

@ -243,6 +243,9 @@ namespace FEXCore::Core {
uint64_t SyscallHandlerFunc{};
uint64_t ExitFunctionLink{};
// Handles returning/calling ARM64EC code from the JIT, expects the target PC in TMP3
uint64_t ExitFunctionEC{};
uint64_t FallbackHandlerPointers[FallbackHandlerIndex::OPINDEX_MAX];
uint64_t NamedVectorConstantPointers[FEXCore::IR::NamedVectorConstant::NAMED_VECTOR_CONST_POOL_MAX];
uint64_t IndexedNamedVectorConstantPointers[FEXCore::IR::IndexNamedVectorConstant::INDEXED_NAMED_VECTOR_MAX];

6
unittests/InstructionCountCI/FEXOpt/libnss.json
View File

@ -197,10 +197,10 @@
"ldr q3, [x11, #272]",
"ldr q4, [x11]",
"ldr q5, [x11, #16]",
"ldr x0, [x28, #1704]",
"ldr x0, [x28, #1712]",
"ldr q6, [x0, #2832]",
"tbl v2.16b, {v2.16b}, v6.16b",
"ldr x0, [x28, #1704]",
"ldr x0, [x28, #1712]",
"ldr q7, [x0, #432]",
"tbl v3.16b, {v3.16b}, v7.16b",
"ldr q8, [x11, #32]",
@ -281,7 +281,7 @@
"mov v9.s[2], w25",
"mov v9.s[1], w20",
"mov v9.s[0], w22",
"ldr x0, [x28, #1704]",
"ldr x0, [x28, #1712]",
"ldr q10, [x0, #224]",
"tbl v4.16b, {v4.16b}, v10.16b",
"mov w20, v9.s[1]",

128
unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
View File

@ -282,7 +282,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -323,7 +323,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -357,7 +357,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -396,7 +396,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -430,7 +430,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -469,7 +469,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -503,7 +503,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -542,7 +542,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -576,7 +576,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -615,7 +615,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -650,7 +650,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -690,7 +690,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -724,7 +724,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -763,7 +763,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -797,7 +797,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -836,7 +836,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -870,7 +870,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -909,7 +909,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -943,7 +943,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -982,7 +982,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1017,7 +1017,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1057,7 +1057,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1091,7 +1091,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1130,7 +1130,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1164,7 +1164,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1203,7 +1203,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1237,7 +1237,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1276,7 +1276,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1310,7 +1310,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1349,7 +1349,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1384,7 +1384,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1424,7 +1424,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1459,7 +1459,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1498,7 +1498,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1532,7 +1532,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1571,7 +1571,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1605,7 +1605,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1644,7 +1644,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1678,7 +1678,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1717,7 +1717,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1751,7 +1751,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1791,7 +1791,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1825,7 +1825,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1864,7 +1864,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1898,7 +1898,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1937,7 +1937,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -1971,7 +1971,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2010,7 +2010,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2044,7 +2044,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2083,7 +2083,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2117,7 +2117,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2157,7 +2157,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2191,7 +2191,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2230,7 +2230,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2264,7 +2264,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2303,7 +2303,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2337,7 +2337,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2376,7 +2376,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2410,7 +2410,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2449,7 +2449,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2483,7 +2483,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2523,7 +2523,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2557,7 +2557,7 @@
"stp x17, x30, [x0], #16",
"fmov s0, s2",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1160]",
"ldr x1, [x28, #1168]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -2596,7 +2596,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1176]",
"ldr x3, [x28, #1184]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",

2
unittests/InstructionCountCI/FlagM/VEX_map1.json
View File

@ -87,7 +87,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1672]",
"ldr x0, [x28, #1680]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",

614
unittests/InstructionCountCI/FlagM/x87.json
View File

File diff suppressed because it is too large Load Diff

68
unittests/InstructionCountCI/FlagM/x87_f64.json
View File

@ -2328,7 +2328,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1504]",
"ldr x1, [x28, #1512]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2403,7 +2403,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1512]",
"ldr x1, [x28, #1520]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2475,7 +2475,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1488]",
"ldr x1, [x28, #1496]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2556,7 +2556,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1496]",
"ldr x1, [x28, #1504]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2656,7 +2656,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1528]",
"ldr x1, [x28, #1536]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2751,7 +2751,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1520]",
"ldr x1, [x28, #1528]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2831,7 +2831,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1512]",
"ldr x1, [x28, #1520]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2917,7 +2917,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1472]",
"ldr x1, [x28, #1480]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2968,7 +2968,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1480]",
"ldr x1, [x28, #1488]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3055,7 +3055,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1536]",
"ldr x1, [x28, #1544]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3119,7 +3119,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1472]",
"ldr x1, [x28, #1480]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3185,7 +3185,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1480]",
"ldr x1, [x28, #1488]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -4207,7 +4207,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -4253,7 +4253,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6485,7 +6485,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6518,7 +6518,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6551,7 +6551,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6584,7 +6584,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6617,7 +6617,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6650,7 +6650,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6683,7 +6683,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6717,7 +6717,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6818,7 +6818,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6851,7 +6851,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6884,7 +6884,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6917,7 +6917,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6950,7 +6950,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6983,7 +6983,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7016,7 +7016,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7049,7 +7049,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9553,7 +9553,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1392]",
"ldr x3, [x28, #1400]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9581,7 +9581,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9619,7 +9619,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9647,7 +9647,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1384]",
"ldr x3, [x28, #1392]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",

2
unittests/InstructionCountCI/H0F3A.json
View File

@ -462,7 +462,7 @@
"0x66 0x0f 0x3a 0x0e"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1736]",
"ldr x0, [x28, #1744]",
"ldr q2, [x0, #3440]",
"tbx v16.16b, {v17.16b}, v2.16b"
]

10
unittests/InstructionCountCI/Secondary.json
View File

@ -1041,7 +1041,7 @@
"Comment": "0x0f 0x70",
"ExpectedArm64ASM": [
"ldr d2, [x28, #784]",
"ldr x0, [x28, #1688]",
"ldr x0, [x28, #1696]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"str d2, [x28, #768]"
@ -1052,7 +1052,7 @@
"Comment": "0x0f 0x70",
"ExpectedArm64ASM": [
"ldr d2, [x4]",
"ldr x0, [x28, #1688]",
"ldr x0, [x28, #1696]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"str d2, [x28, #768]"
@ -3306,7 +3306,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #1712]",
"ldr x0, [x28, #1720]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v16.16b, v17.16b}, v2.16b"
]
@ -3315,7 +3315,7 @@
"ExpectedInstructionCount": 5,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #1712]",
"ldr x0, [x28, #1720]",
"ldr q2, [x0, #16]",
"mov v0.16b, v17.16b",
"mov v1.16b, v16.16b",
@ -3327,7 +3327,7 @@
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #1712]",
"ldr x0, [x28, #1720]",
"ldr q3, [x0, #16]",
"mov v0.16b, v16.16b",
"mov v1.16b, v2.16b",

4
unittests/InstructionCountCI/Secondary_OpSize.json
View File

@ -522,7 +522,7 @@
"0x66 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1704]",
"ldr x0, [x28, #1712]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@ -536,7 +536,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #1704]",
"ldr x0, [x28, #1712]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v2.16b}, v3.16b"
]

2
unittests/InstructionCountCI/Secondary_REP.json
View File

@ -354,7 +354,7 @@
"0xf3 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1696]",
"ldr x0, [x28, #1704]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]

2
unittests/InstructionCountCI/Secondary_REPNE.json
View File

@ -296,7 +296,7 @@
"0xf2 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1688]",
"ldr x0, [x28, #1696]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]

12
unittests/InstructionCountCI/VEX_map1.json
View File

@ -2755,7 +2755,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1712]",
"ldr x0, [x28, #1720]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@ -2824,7 +2824,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1712]",
"ldr x0, [x28, #1720]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@ -2893,7 +2893,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1712]",
"ldr x0, [x28, #1720]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@ -4349,7 +4349,7 @@
"Map 1 0b01 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1592]",
"ldr x0, [x28, #1600]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.d, z17.d, z2.d"
@ -4372,7 +4372,7 @@
"Map 1 0b11 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1576]",
"ldr x0, [x28, #1584]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.s, z17.s, z2.s"
@ -4513,7 +4513,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1672]",
"ldr x0, [x28, #1680]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",

614
unittests/InstructionCountCI/x87.json
View File

File diff suppressed because it is too large Load Diff

68
unittests/InstructionCountCI/x87_f64.json
View File

@ -2346,7 +2346,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1504]",
"ldr x1, [x28, #1512]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2421,7 +2421,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1512]",
"ldr x1, [x28, #1520]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2493,7 +2493,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1488]",
"ldr x1, [x28, #1496]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2574,7 +2574,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1496]",
"ldr x1, [x28, #1504]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2674,7 +2674,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1528]",
"ldr x1, [x28, #1536]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2769,7 +2769,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1520]",
"ldr x1, [x28, #1528]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2849,7 +2849,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1512]",
"ldr x1, [x28, #1520]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2935,7 +2935,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1472]",
"ldr x1, [x28, #1480]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2986,7 +2986,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1480]",
"ldr x1, [x28, #1488]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3073,7 +3073,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1536]",
"ldr x1, [x28, #1544]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3137,7 +3137,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1472]",
"ldr x1, [x28, #1480]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3203,7 +3203,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1480]",
"ldr x1, [x28, #1488]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -4228,7 +4228,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -4274,7 +4274,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6604,7 +6604,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6637,7 +6637,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6670,7 +6670,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6703,7 +6703,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6736,7 +6736,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6769,7 +6769,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v3.d[0]",
"umov w2, v3.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6802,7 +6802,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6836,7 +6836,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6937,7 +6937,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -6970,7 +6970,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7003,7 +7003,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7036,7 +7036,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7069,7 +7069,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7102,7 +7102,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7135,7 +7135,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -7168,7 +7168,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9691,7 +9691,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1392]",
"ldr x3, [x28, #1400]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9719,7 +9719,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1184]",
"ldr x3, [x28, #1192]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9757,7 +9757,7 @@
"str x30, [x0], #16",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1024]",
"ldr x1, [x28, #1168]",
"ldr x1, [x28, #1176]",
"blr x1",
"ldr w4, [x28, #728]",
"msr nzcv, x4",
@ -9785,7 +9785,7 @@
"ldrh w0, [x28, #1024]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1384]",
"ldr x3, [x28, #1392]",
"blr x3",
"ldr w4, [x28, #728]",
"msr nzcv, x4",