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OpcodeDispatcher: Handle VPMOVSXBW

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This commit is contained in:
lioncash 2022-12-15 17:48:34 +00:00
parent 588a2611a7
commit 21537a3636
4 changed files with 39 additions and 1 deletions
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2
External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp vendored
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@ -5959,6 +5959,8 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(2, 0b01, 0x1D), 1, &OpDispatchBuilder::AVXVectorUnaryOp<IR::OP_VABS, 2, false>},
{OPD(2, 0b01, 0x1E), 1, &OpDispatchBuilder::AVXVectorUnaryOp<IR::OP_VABS, 4, false>},
{OPD(2, 0b01, 0x20), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 2, true>},
{OPD(2, 0b01, 0x29), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VCMPEQ, 8>},
{OPD(2, 0b01, 0x2A), 1, &OpDispatchBuilder::VMOVVectorNTOp},

3
External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp vendored
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@ -2700,6 +2700,9 @@ void OpDispatchBuilder::AVXExtendVectorElements<2, 8, false>(OpcodeArgs);
template
void OpDispatchBuilder::AVXExtendVectorElements<4, 8, false>(OpcodeArgs);
template
void OpDispatchBuilder::AVXExtendVectorElements<1, 2, true>(OpcodeArgs);
OrderedNode* OpDispatchBuilder::VectorRoundImpl(OpcodeArgs, size_t ElementSize,
OrderedNode *Src, uint64_t Mode) {
const auto Size = GetDstSize(Op);

2
External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp vendored
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@ -289,7 +289,7 @@ void InitializeVEXTables() {
{OPD(2, 0b01, 0x1D), 1, X86InstInfo{"VPABSW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x1E), 1, X86InstInfo{"VPABSD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x20), 1, X86InstInfo{"VPMOVSXBW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x20), 1, X86InstInfo{"VPMOVSXBW", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x21), 1, X86InstInfo{"VPMOVSXBD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x22), 1, X86InstInfo{"VPMOVSXBQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x23), 1, X86InstInfo{"VPMOVSXWD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},

33
unittests/ASM/VEX/vpmovsxbw.asm Normal file
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@ -0,0 +1,33 @@
%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM0": ["0x4142434485868788", "0x5152535455565758", "0x4142434485868788", "0x5152535455565758"],
"XMM1": ["0xFF85FF86FF87FF88", "0x0041004200430044", "0x0000000000000000", "0x0000000000000000"],
"XMM2": ["0xFF85FF86FF87FF88", "0x0041004200430044", "0x0055005600570058", "0x0051005200530054"],
"XMM3": ["0xFF85FF86FF87FF88", "0x0041004200430044", "0x0000000000000000", "0x0000000000000000"],
"XMM4": ["0xFF85FF86FF87FF88", "0x0041004200430044", "0x0055005600570058", "0x0051005200530054"]
}
}
%endif
lea rdx, [rel .data]
vmovapd ymm0, [rdx]
; Memory operands
vpmovsxbw xmm1, [rdx]
vpmovsxbw ymm2, [rdx]
; Register only
vpmovsxbw xmm3, xmm0
vpmovsxbw ymm4, xmm0
hlt
align 32
.data:
dq 0x4142434485868788
dq 0x5152535455565758
dq 0x4142434485868788
dq 0x5152535455565758