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InstCountCI: Fixes test to not use relative data

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JIT code and loaded code memory offsets aren't consistent run to run
which causes code generation consistency issues.
Instead use a register plus an immediate that can't fit in a single
16-bit encoding to get similar register allocation to RIP relative
addresses.

At some point it will probably be nice to support consistent placement
of both guest and host code so RIP relative can be used, but we don't have
support in our backend to do that.
This commit is contained in:
Ryan Houdek 2024-01-30 17:40:36 -08:00
parent 2884337d85
commit 28715a1df6
1 changed files with 89 additions and 109 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

198
unittests/InstructionCountCI/FEXOpt/libnss.json
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@ -16,7 +16,7 @@
"Comment": [],
"Instructions": {
"libnss3 sha": {
"ExpectedInstructionCount": 4334,
"ExpectedInstructionCount": 4315,
"Comment": [
"This block of code comes from libnss3 which causes panic spilling in FEX's RA.",
"This code is hit in steamwebhelper calling in to this function.",
@ -35,14 +35,14 @@
"movdqa xmm3, xmm0",
"palignr xmm3, xmm2, 0x8",
"pblendw xmm2, xmm0, 0xf0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"movdqa xmm4, xmm2",
"movdqa xmm1, xmm3",
"pshufb xmm5, xmm0",
"pshufb xmm6, xmm0",
"pshufb xmm7, xmm0",
"pshufb xmm8, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"paddd xmm0, xmm8",
"sha256msg1 xmm8, xmm7",
"sha256rnds2 xmm4, xmm3",
@ -51,7 +51,7 @@
"movdqa xmm0, xmm5",
"palignr xmm0, xmm6, 0x4",
"paddd xmm8, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm8, xmm5",
"paddd xmm0, xmm7",
"sha256msg1 xmm7, xmm6",
@ -61,7 +61,7 @@
"movdqa xmm0, xmm8",
"palignr xmm0, xmm5, 0x4",
"paddd xmm7, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm7, xmm8",
"paddd xmm0, xmm6",
"sha256msg1 xmm6, xmm5",
@ -71,7 +71,7 @@
"movdqa xmm0, xmm7",
"palignr xmm0, xmm8, 0x4",
"paddd xmm6, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm6, xmm7",
"paddd xmm0, xmm5",
"sha256msg1 xmm5, xmm8",
@ -81,7 +81,7 @@
"movdqa xmm0, xmm6",
"palignr xmm0, xmm7, 0x4",
"paddd xmm5, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm5, xmm6",
"paddd xmm0, xmm8",
"sha256msg1 xmm8, xmm7",
@ -91,7 +91,7 @@
"movdqa xmm0, xmm5",
"palignr xmm0, xmm6, 0x4",
"paddd xmm8, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm8, xmm5",
"paddd xmm0, xmm7",
"sha256msg1 xmm7, xmm6",
@ -101,7 +101,7 @@
"movdqa xmm0, xmm8",
"palignr xmm0, xmm5, 0x4",
"paddd xmm7, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm7, xmm8",
"paddd xmm0, xmm6",
"sha256msg1 xmm6, xmm5",
@ -111,7 +111,7 @@
"movdqa xmm0, xmm7",
"palignr xmm0, xmm8, 0x4",
"paddd xmm6, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm6, xmm7",
"paddd xmm0, xmm5",
"sha256msg1 xmm5, xmm8",
@ -121,7 +121,7 @@
"movdqa xmm0, xmm6",
"palignr xmm0, xmm7, 0x4",
"paddd xmm5, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm5, xmm6",
"paddd xmm0, xmm8",
"sha256msg1 xmm8, xmm7",
@ -131,7 +131,7 @@
"movdqa xmm0, xmm5",
"palignr xmm0, xmm6, 0x4",
"paddd xmm8, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm8, xmm5",
"paddd xmm0, xmm7",
"sha256msg1 xmm7, xmm6",
@ -141,7 +141,7 @@
"movdqa xmm0, xmm8",
"palignr xmm0, xmm5, 0x4",
"paddd xmm7, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm7, xmm8",
"paddd xmm0, xmm6",
"sha256msg1 xmm6, xmm5",
@ -151,7 +151,7 @@
"movdqa xmm0, xmm7",
"palignr xmm0, xmm8, 0x4",
"paddd xmm6, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm6, xmm7",
"paddd xmm0, xmm5",
"sha256msg1 xmm5, xmm8",
@ -160,12 +160,12 @@
"sha256rnds2 xmm1, xmm4",
"movdqa xmm0, xmm6",
"palignr xmm0, xmm7, 0x4",
"paddd xmm7, [rel .data]",
"paddd xmm7, [r15 + 0x1_1000]",
"paddd xmm5, xmm0",
"movdqa xmm0, [rel .data]",
"movdqa xmm0, [r15 + 0x1_1000]",
"sha256msg2 xmm5, xmm6",
"paddd xmm6, [rel .data]",
"paddd xmm5, [rel .data]",
"paddd xmm6, [r15 + 0x1_1000]",
"paddd xmm5, [r15 + 0x1_1000]",
"paddd xmm0, xmm8",
"sha256rnds2 xmm4, xmm1",
"pshufd xmm0, xmm0, 0xe",
@ -190,8 +190,7 @@
"pblendw xmm0, xmm4, 0xf0",
"palignr xmm4, xmm1, 0x8",
"movups [rdi+0x100], xmm0",
"movups [rdi+0x110], xmm4",
".data:"
"movups [rdi+0x110], xmm4"
],
"ExpectedArm64ASM": [
"mov w0, #0x3c00",
@ -211,9 +210,9 @@
"mov v19.16b, v16.16b",
"ext v19.16b, v18.16b, v16.16b, #8",
"mov v18.d[1], v16.d[1]",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov v20.16b, v18.16b",
"mov v17.16b, v19.16b",
"movi v4.16b, #0x8f",
@ -228,9 +227,7 @@
"movi v4.16b, #0x8f",
"and v4.16b, v16.16b, v4.16b",
"tbl v24.16b, {v24.16b}, v4.16b",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"ldr q16, [x29, x20, sxtx]",
"add v16.4s, v16.4s, v24.4s",
"unimplemented (Unimplemented)",
"mov w20, v19.s[3]",
@ -471,9 +468,9 @@
"mov v16.16b, v21.16b",
"ext v16.16b, v22.16b, v21.16b, #4",
"add v24.4s, v24.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v21.s[2]",
"mov w21, v21.s[3]",
"mov w22, v24.s[0]",
@ -748,9 +745,9 @@
"mov v16.16b, v24.16b",
"ext v16.16b, v21.16b, v24.16b, #4",
"add v23.4s, v23.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v24.s[2]",
"mov w21, v24.s[3]",
"mov w22, v23.s[0]",
@ -1025,9 +1022,9 @@
"mov v16.16b, v23.16b",
"ext v16.16b, v24.16b, v23.16b, #4",
"add v22.4s, v22.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v23.s[2]",
"mov w21, v23.s[3]",
"mov w22, v22.s[0]",
@ -1302,9 +1299,9 @@
"mov v16.16b, v22.16b",
"ext v16.16b, v23.16b, v22.16b, #4",
"add v21.4s, v21.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v22.s[2]",
"mov w21, v22.s[3]",
"mov w22, v21.s[0]",
@ -1579,9 +1576,9 @@
"mov v16.16b, v21.16b",
"ext v16.16b, v22.16b, v21.16b, #4",
"add v24.4s, v24.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v21.s[2]",
"mov w21, v21.s[3]",
"mov w22, v24.s[0]",
@ -1856,9 +1853,9 @@
"mov v16.16b, v24.16b",
"ext v16.16b, v21.16b, v24.16b, #4",
"add v23.4s, v23.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v24.s[2]",
"mov w21, v24.s[3]",
"mov w22, v23.s[0]",
@ -2133,9 +2130,9 @@
"mov v16.16b, v23.16b",
"ext v16.16b, v24.16b, v23.16b, #4",
"add v22.4s, v22.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v23.s[2]",
"mov w21, v23.s[3]",
"mov w22, v22.s[0]",
@ -2410,9 +2407,9 @@
"mov v16.16b, v22.16b",
"ext v16.16b, v23.16b, v22.16b, #4",
"add v21.4s, v21.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v22.s[2]",
"mov w21, v22.s[3]",
"mov w22, v21.s[0]",
@ -2687,9 +2684,9 @@
"mov v16.16b, v21.16b",
"ext v16.16b, v22.16b, v21.16b, #4",
"add v24.4s, v24.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v21.s[2]",
"mov w21, v21.s[3]",
"mov w22, v24.s[0]",
@ -2964,9 +2961,9 @@
"mov v16.16b, v24.16b",
"ext v16.16b, v21.16b, v24.16b, #4",
"add v23.4s, v23.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v24.s[2]",
"mov w21, v24.s[3]",
"mov w22, v23.s[0]",
@ -3241,9 +3238,9 @@
"mov v16.16b, v23.16b",
"ext v16.16b, v24.16b, v23.16b, #4",
"add v22.4s, v22.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q16, [x29, x20, sxtx]",
"mov w20, v23.s[2]",
"mov w21, v23.s[3]",
"mov w22, v22.s[0]",
@ -3517,57 +3514,51 @@
"mov v17.s[0], w23",
"mov v16.16b, v22.16b",
"ext v16.16b, v23.16b, v22.16b, #4",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q5, [x20]",
"mov w20, #0x1000",
"movk w20, #0x1, lsl #16",
"ldr q5, [x29, x20, sxtx]",
"add v23.4s, v23.4s, v5.4s",
"add v21.4s, v21.4s, v16.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q16, [x20]",
"mov w20, v22.s[2]",
"mov w21, v22.s[3]",
"mov w22, v21.s[0]",
"ror w23, w20, #17",
"ror w24, w20, #19",
"eor w23, w23, w24",
"lsr w20, w20, #10",
"eor w20, w23, w20",
"add w20, w22, w20",
"mov w22, v21.s[1]",
"ror w23, w21, #17",
"ror w24, w21, #19",
"eor w23, w23, w24",
"ldr q16, [x29, x20, sxtx]",
"mov w21, v22.s[2]",
"mov w22, v22.s[3]",
"mov w23, v21.s[0]",
"ror w24, w21, #17",
"ror w25, w21, #19",
"eor w24, w24, w25",
"lsr w21, w21, #10",
"eor w21, w23, w21",
"add w21, w22, w21",
"mov w22, v21.s[2]",
"ror w23, w20, #17",
"ror w24, w20, #19",
"eor w23, w23, w24",
"lsr w24, w20, #10",
"eor w23, w23, w24",
"add w22, w22, w23",
"mov w23, v21.s[3]",
"eor w21, w24, w21",
"add w21, w23, w21",
"mov w23, v21.s[1]",
"ror w24, w22, #17",
"ror w25, w22, #19",
"eor w24, w24, w25",
"lsr w22, w22, #10",
"eor w22, w24, w22",
"add w22, w23, w22",
"mov w23, v21.s[2]",
"ror w24, w21, #17",
"ror w25, w21, #19",
"eor w24, w24, w25",
"lsr w25, w21, #10",
"eor w24, w24, w25",
"add w23, w23, w24",
"mov w24, v21.s[3]",
"ror w25, w22, #17",
"ror w30, w22, #19",
"eor w25, w25, w30",
"lsr w30, w22, #10",
"eor w25, w25, w30",
"add w24, w24, w25",
"mov v5.16b, v21.16b",
"mov v5.s[3], w23",
"mov v5.s[2], w22",
"mov v5.s[1], w21",
"mov v5.s[3], w24",
"mov v5.s[2], w23",
"mov v5.s[1], w22",
"mov v21.16b, v5.16b",
"mov v21.s[0], w20",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q5, [x20]",
"mov v21.s[0], w21",
"ldr q5, [x29, x20, sxtx]",
"add v22.4s, v22.4s, v5.4s",
"adrp x20,",
"add x20, x20, #0x40c (1036)",
"ldr q5, [x20]",
"ldr q5, [x29, x20, sxtx]",
"add v21.4s, v21.4s, v5.4s",
"add v16.4s, v16.4s, v24.4s",
"mov w20, v17.s[3]",
@ -4515,17 +4506,6 @@
"ext v20.16b, v17.16b, v20.16b, #8",
"str q16, [x11, #256]",
"str q20, [x11, #272]",
"uxtb w20, w4",
"ldrb w21, [x4]",
"add w26, w21, w20",
"strb w26, [x4]",
"eor w27, w21, w20",
"cmn wzr, w26, lsl #24",
"rmif x26, #7, #nzCv",
"eor w20, w21, w20",
"eor w21, w26, w21",
"bic w20, w21, w20",
"rmif x20, #7, #nzcV",
"mov w0, #0x3c00",
"add sp, sp, x0"
]