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OpcodeDispatcher: Handle VCVTTPD2DQ

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This commit is contained in:
lioncash 2022-12-28 11:56:24 +00:00
parent b00b41b8fa
commit 2a7795fe2c
4 changed files with 146 additions and 1 deletions
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1
External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp vendored
View File

@ -5952,6 +5952,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(1, 0b01, 0xE4), 1, &OpDispatchBuilder::VPMULHWOp<false>},
{OPD(1, 0b01, 0xE5), 1, &OpDispatchBuilder::VPMULHWOp<true>},
{OPD(1, 0b01, 0xE6), 1, &OpDispatchBuilder::AVXVector_CVT_Float_To_Int<8, true, false>},
{OPD(1, 0b10, 0xE6), 1, &OpDispatchBuilder::AVXVector_CVT_Int_To_Float<4, true>},
{OPD(1, 0b11, 0xE6), 1, &OpDispatchBuilder::AVXVector_CVT_Float_To_Int<8, true, true>},

2
External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp vendored
View File

@ -1814,6 +1814,8 @@ void OpDispatchBuilder::AVXVector_CVT_Float_To_Int<4, false, false>(OpcodeArgs);
template
void OpDispatchBuilder::AVXVector_CVT_Float_To_Int<4, false, true>(OpcodeArgs);
template
void OpDispatchBuilder::AVXVector_CVT_Float_To_Int<8, true, false>(OpcodeArgs);
template
void OpDispatchBuilder::AVXVector_CVT_Float_To_Int<8, true, true>(OpcodeArgs);

2
External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp vendored
View File

@ -226,7 +226,7 @@ void InitializeVEXTables() {
{OPD(1, 0b01, 0xE4), 1, X86InstInfo{"VPMULHUW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b01, 0xE5), 1, X86InstInfo{"VPMULHW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b01, 0xE6), 1, X86InstInfo{"VCVTTPD2DQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(1, 0b01, 0xE6), 1, X86InstInfo{"VCVTTPD2DQ", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b10, 0xE6), 1, X86InstInfo{"VCVTDQ2PD", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b11, 0xE6), 1, X86InstInfo{"VCVTPD2DQ", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},

142
unittests/ASM/VEX/vcvttpd2dq.asm Normal file
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@ -0,0 +1,142 @@
%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM0": ["0x0000004500000053", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM1": ["0x0000000D00000029", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM2": ["0x0000001500000005", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM3": ["0x0000000500000009", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM4": ["0x000000420000001D", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM5": ["0x0000005B00000013", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM6": ["0x0000003200000028", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM7": ["0x0000001700000020", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
"XMM8": ["0x000000180000005A", "0x000000180000005A", "0x0000000000000000", "0x0000000000000000"],
"XMM9": ["0x0000005B00000062", "0x0000005B00000062", "0x0000000000000000", "0x0000000000000000"],
"XMM10": ["0x000000630000005A", "0x000000630000005A", "0x0000000000000000", "0x0000000000000000"],
"XMM11": ["0x0000004A00000040", "0x0000004A00000040", "0x0000000000000000", "0x0000000000000000"],
"XMM12": ["0x0000001900000023", "0x0000001900000023", "0x0000000000000000", "0x0000000000000000"],
"XMM13": ["0x0000005A00000005", "0x0000005A00000005", "0x0000000000000000", "0x0000000000000000"],
"XMM14": ["0x0000003400000021", "0x0000003400000021", "0x0000000000000000", "0x0000000000000000"],
"XMM15": ["0x0000000A0000003A", "0x0000000A0000003A", "0x0000000000000000", "0x0000000000000000"]
}
}
%endif
lea rdx, [rel .data]
vcvttpd2dq xmm0, oword [rdx + 32 * 0]
vcvttpd2dq xmm1, oword [rdx + 32 * 1]
vcvttpd2dq xmm2, oword [rdx + 32 * 2]
vcvttpd2dq xmm3, oword [rdx + 32 * 3]
vcvttpd2dq xmm4, oword [rdx + 32 * 4]
vcvttpd2dq xmm5, oword [rdx + 32 * 5]
vcvttpd2dq xmm6, oword [rdx + 32 * 6]
vcvttpd2dq xmm7, oword [rdx + 32 * 7]
vcvttpd2dq xmm8, yword [rdx + 32 * 8]
vcvttpd2dq xmm9, yword [rdx + 32 * 9]
vcvttpd2dq xmm10, yword [rdx + 32 * 10]
vcvttpd2dq xmm11, yword [rdx + 32 * 11]
vcvttpd2dq xmm12, yword [rdx + 32 * 12]
vcvttpd2dq xmm13, yword [rdx + 32 * 13]
vcvttpd2dq xmm14, yword [rdx + 32 * 14]
vcvttpd2dq xmm15, yword [rdx + 32 * 15]
hlt
align 32
.data:
dq 83.0999 , 69.50512
dq 83.0999 , 69.50512
dq 41.02678, 13.05881
dq 41.02678, 13.05881
dq 5.35242 , 21.9932
dq 5.35242 , 21.9932
dq 9.67383 , 5.32372
dq 9.67383 , 5.32372
dq 29.02872, 66.50151
dq 29.02872, 66.50151
dq 19.30764, 91.3633
dq 19.30764, 91.3633
dq 40.45086, 50.96153
dq 40.45086, 50.96153
dq 32.64489, 23.97574
dq 32.64489, 23.97574
dq 90.64316, 24.22547
dq 90.64316, 24.22547
dq 98.9394 , 91.21715
dq 98.9394 , 91.21715
dq 90.80143, 99.48407
dq 90.80143, 99.48407
dq 64.97245, 74.39838
dq 64.97245, 74.39838
dq 35.22761, 25.35321
dq 35.22761, 25.35321
dq 5.8732 , 90.19956
dq 5.8732 , 90.19956
dq 33.03133, 52.02952
dq 33.03133, 52.02952
dq 58.38554, 10.17531
dq 58.38554, 10.17531
dq 47.84703, 84.04831
dq 47.84703, 84.04831
dq 90.02965, 65.81329
dq 90.02965, 65.81329
dq 96.27991, 6.64479
dq 96.27991, 6.64479
dq 25.58971, 95.00694
dq 25.58971, 95.00694
dq 88.1929 , 37.16964
dq 88.1929 , 37.16964
dq 49.52602, 10.27223
dq 49.52602, 10.27223
dq 77.70605, 20.21439
dq 77.70605, 20.21439
dq 9.8056 , 41.29389
dq 9.8056 , 41.29389
dq 15.4071 , 57.54286
dq 15.4071 , 57.54286
dq 9.61117 , 55.54302
dq 9.61117 , 55.54302
dq 52.90745, 4.88086
dq 52.90745, 4.88086
dq 72.52882, 3.0201
dq 72.52882, 3.0201
dq 56.55091, 71.22749
dq 56.55091, 71.22749
dq 61.84736, 88.74295
dq 61.84736, 88.74295
dq 47.72641, 24.17404
dq 47.72641, 24.17404
dq 33.70564, 96.71303
dq 33.70564, 96.71303