OpcodeDispatcher: Handle VPMOVZXBD

This commit is contained in:
lioncash 2022-12-15 17:22:03 +00:00
parent 6bb0c5b24c
commit 2b5570a910
4 changed files with 37 additions and 1 deletions

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@ -5963,6 +5963,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(2, 0b01, 0x2A), 1, &OpDispatchBuilder::VMOVVectorNTOp},
{OPD(2, 0b01, 0x30), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 2, false>},
{OPD(2, 0b01, 0x31), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 4, false>},
{OPD(2, 0b01, 0x37), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VCMPGT, 8>},
{OPD(2, 0b01, 0x38), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VSMIN, 1>},

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@ -2689,6 +2689,8 @@ void OpDispatchBuilder::AVXExtendVectorElements(OpcodeArgs) {
template
void OpDispatchBuilder::AVXExtendVectorElements<1, 2, false>(OpcodeArgs);
template
void OpDispatchBuilder::AVXExtendVectorElements<1, 4, false>(OpcodeArgs);
OrderedNode* OpDispatchBuilder::VectorRoundImpl(OpcodeArgs, size_t ElementSize,
OrderedNode *Src, uint64_t Mode) {

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@ -306,7 +306,7 @@ void InitializeVEXTables() {
{OPD(2, 0b01, 0x2F), 1, X86InstInfo{"VMASKMOVPD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x30), 1, X86InstInfo{"VPMOVZXBW", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x31), 1, X86InstInfo{"VPMOVZXBD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x31), 1, X86InstInfo{"VPMOVZXBD", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x32), 1, X86InstInfo{"VPMOVZXBQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x33), 1, X86InstInfo{"VPMOVZXWD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x34), 1, X86InstInfo{"VPMOVZXWQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},

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@ -0,0 +1,33 @@
%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM0": ["0x4142434485868788", "0x5152535455565758", "0x4142434485868788", "0x5152535455565758"],
"XMM1": ["0x0000008700000088", "0x0000008500000086", "0x0000000000000000", "0x0000000000000000"],
"XMM2": ["0x0000008700000088", "0x0000008500000086", "0x0000004300000044", "0x0000004100000042"],
"XMM3": ["0x0000008700000088", "0x0000008500000086", "0x0000000000000000", "0x0000000000000000"],
"XMM4": ["0x0000008700000088", "0x0000008500000086", "0x0000004300000044", "0x0000004100000042"]
}
}
%endif
lea rdx, [rel .data]
vmovapd ymm0, [rdx]
; Memory operands
vpmovzxbd xmm1, [rdx]
vpmovzxbd ymm2, [rdx]
; Register only
vpmovzxbd xmm3, xmm0
vpmovzxbd ymm4, xmm0
hlt
align 32
.data:
dq 0x4142434485868788
dq 0x5152535455565758
dq 0x4142434485868788
dq 0x5152535455565758