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IR: Change VFMLS to use IR::OpSize

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Ryan Houdek 2024-10-28 01:15:25 -07:00
parent bd5159c7d5
commit 362b5728be
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1 changed files with 1 additions and 1 deletions
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FEXCore/Source/Interface/IR/IR.json
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@ -2495,7 +2495,7 @@
"NumElements": "RegisterSize / ElementSize",
"TiedSource": 2
},
"FPR = VFMLS u8:#RegisterSize, u8:#ElementSize, FPR:$Vector1, FPR:$Vector2, FPR:$Addend": {
"FPR = VFMLS OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Vector1, FPR:$Vector2, FPR:$Addend": {
"Desc": [
"Dest = (Vector1 * Vector2) - Addend",
"This explicitly matches x86 FMA semantics because ARM semantics are mind-bending."