FEX-Emu/FEX
1
0
Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2025-02-14 03:30:46 +00:00
Code Issues Actions 6 Packages Projects Releases Wiki Activity

OpDisp: Imm SAR OpSize < 32 needs sign extension

Browse Source
This commit is contained in:
Stefanos Kornilios Mitsis Poiitidis 2021-02-17 07:02:09 +02:00
parent 5ae6a64800
commit 3bc12de017
5 changed files with 11 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp vendored
View File

@ -1871,6 +1871,10 @@ void OpDispatchBuilder::ASHRImmediateOp(OpcodeArgs) {
else
Shift &= 0x1F;
if (Size < 32) {
Dest = _Sbfe(Size, 0, Dest);
}
OrderedNode *Src = _Constant(Size, Shift);
OrderedNode *Result = _Ashr(Dest, Src);

2
unittests/gcc-target-tests-32/Disabled_Tests
View File

@ -0,0 +1,2 @@
# Uses AVX
pr57275.c.gcc-target-test-64

4
unittests/gcc-target-tests-32/Known_Failures
View File

@ -1,10 +1,6 @@
pr72867.c.gcc-target-test-32
pr88240.c.gcc-target-test-32
sse2-mmx-pextrw.c.gcc-target-test-32
sse2-mmx-psraw.c.gcc-target-test-32
sse2-mmx-psrawi.c.gcc-target-test-32
sse2-psraw-1.c.gcc-target-test-32
sse2-shiftqihi-constant-2.c.gcc-target-test-32
# this uses AVX ops (VMOVAPS)
pr57275.c.gcc-target-test-32

4
unittests/gcc-target-tests-64/Disabled_Tests
View File

@ -3,6 +3,7 @@ pr72867.c.gcc-target-test-64
sse2-mmx-pslld.c.gcc-target-test-64
sse2-mmx-psllq.c.gcc-target-test-64
sse2-mmx-psllw.c.gcc-target-test-64
sse2-mmx-psraw.c.gcc-target-test-64
sse2-mmx-psrad.c.gcc-target-test-64
sse2-mmx-psrld.c.gcc-target-test-64
sse2-mmx-psrlq.c.gcc-target-test-64
@ -10,3 +11,6 @@ sse2-mmx-psrlw.c.gcc-target-test-64
# this is flaky on the ARMv8.0 runner
mcount_pic.c.gcc-target-test-64
# Uses AVX
pr57275.c.gcc-target-test-64

5
unittests/gcc-target-tests-64/Known_Failures
View File

@ -2,16 +2,13 @@
asm-5.c.gcc-target-test-64
pr88240.c.gcc-target-test-64
sse2-mmx-pextrw.c.gcc-target-test-64
sse2-mmx-psraw.c.gcc-target-test-64
sse2-mmx-psrawi.c.gcc-target-test-64
sse2-psraw-1.c.gcc-target-test-64
sse2-shiftqihi-constant-2.c.gcc-target-test-64
# these fail on arm
pr72867.c.gcc-target-test-64
sse2-mmx-pslld.c.gcc-target-test-64
sse2-mmx-psllq.c.gcc-target-test-64
sse2-mmx-psllw.c.gcc-target-test-64
sse2-mmx-psraw.c.gcc-target-test-64
sse2-mmx-psrad.c.gcc-target-test-64
sse2-mmx-psrld.c.gcc-target-test-64
sse2-mmx-psrlq.c.gcc-target-test-64