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OpcodeDispatcher: rewrite AAA
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
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@ -3224,40 +3224,26 @@ void OpDispatchBuilder::AAAOp(OpcodeArgs) {
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InvalidateDeferredFlags();
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auto AF = LoadAF();
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auto AL = LoadGPRRegister(X86State::REG_RAX, 1);
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auto AX = LoadGPRRegister(X86State::REG_RAX, 2);
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auto Cond = _Or(OpSize::i64Bit, AF, _Select(FEXCore::IR::COND_UGT, _And(OpSize::i64Bit, AL, _Constant(0xF)), _Constant(9), _Constant(1), _Constant(0)));
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auto A = LoadGPRRegister(X86State::REG_RAX);
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auto FalseBlock = CreateNewCodeBlockAfter(GetCurrentBlock());
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auto TrueBlock = CreateNewCodeBlockAfter(FalseBlock);
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auto EndBlock = CreateNewCodeBlockAfter(TrueBlock);
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CondJump(Cond, TrueBlock, FalseBlock);
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// AF |= ((AL & 0x0F) > 9);
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AF = _Or(OpSize::i32Bit, AF,
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_Select(FEXCore::IR::COND_UGT, _And(OpSize::i32Bit, A, _Constant(0xF)), _Constant(9),
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_Constant(1), _Constant(0)));
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SetCurrentCodeBlock(FalseBlock);
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StartNewBlock();
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{
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auto NewAX = _And(OpSize::i64Bit, AX, _Constant(0xFF0F));
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StoreGPRRegister(X86State::REG_RAX, NewAX, 2);
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ZeroNZCV();
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SetAF(0);
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CalculateDeferredFlags();
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Jump(EndBlock);
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}
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SetCurrentCodeBlock(TrueBlock);
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StartNewBlock();
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// CF = AF, OF/SF/ZF/PF undefined
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ZeroNZCV();
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SetRFLAG<FEXCore::X86State::RFLAG_CF_RAW_LOC>(AF);
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SetAFAndFixup(AF);
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CalculateDeferredFlags();
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{
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auto NewAX = _Add(OpSize::i64Bit, AX, _Constant(0x106));
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auto Result = _And(OpSize::i64Bit, NewAX, _Constant(0xFF0F));
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StoreGPRRegister(X86State::REG_RAX, Result, 2);
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ZeroNZCV();
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SetRFLAG<FEXCore::X86State::RFLAG_CF_RAW_LOC>(_Constant(1));
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SetAF(1);
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CalculateDeferredFlags();
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Jump(EndBlock);
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}
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SetCurrentCodeBlock(EndBlock);
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StartNewBlock();
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// AX = CF ? (AX + 0x106) : 0
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A = _NZCVSelect(OpSize::i32Bit, CondClassType{COND_UGE} /* CF = 1 */,
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_Add(OpSize::i32Bit, A, _Constant(0x106)), A);
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// AL = AL & 0x0F
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A = _And(OpSize::i32Bit, A, _Constant(0xFF0F));
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StoreGPRRegister(X86State::REG_RAX, A, 2);
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}
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void OpDispatchBuilder::AASOp(OpcodeArgs) {
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