mirror of
https://github.com/FEX-Emu/FEX.git
synced 2024-11-27 00:30:40 +00:00
OpcodeDispatcher: Convert flags helpers over to OpSize
NFC Plus the tertiary bits that require changing to support it.
This commit is contained in:
parent
04c701e912
commit
4b10cbdafd
@ -288,8 +288,8 @@ void OpDispatchBuilder::ADCOp(OpcodeArgs, uint32_t SrcIndex) {
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CalculateDeferredFlags();
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Ref Src = LoadSource(GPRClass, Op, Op->Src[SrcIndex], Op->Flags, {.AllowUpperGarbage = true});
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uint8_t Size = GetDstSize(Op);
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const auto OpSize = IR::SizeToOpSize(std::max<uint8_t>(OpSize::i32Bit, Size));
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const auto Size = OpSizeFromDst(Op);
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const auto OpSize = std::max(OpSize::i32Bit, Size);
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Ref Before {};
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if (DestIsLockedMem(Op)) {
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@ -324,8 +324,8 @@ void OpDispatchBuilder::SBBOp(OpcodeArgs, uint32_t SrcIndex) {
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CalculateDeferredFlags();
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Ref Src = LoadSource(GPRClass, Op, Op->Src[SrcIndex], Op->Flags, {.AllowUpperGarbage = true});
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auto Size = GetDstSize(Op);
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const auto OpSize = IR::SizeToOpSize(std::max<uint8_t>(OpSize::i32Bit, Size));
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const auto Size = OpSizeFromDst(Op);
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const auto OpSize = std::max(OpSize::i32Bit, Size);
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Ref Result {};
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Ref Before {};
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@ -1080,7 +1080,7 @@ void OpDispatchBuilder::CMPOp(OpcodeArgs, uint32_t SrcIndex) {
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// Result isn't stored in result, only writes to flags
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Ref Src = LoadSource(GPRClass, Op, Op->Src[SrcIndex], Op->Flags, {.AllowUpperGarbage = true});
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Ref Dest = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.AllowUpperGarbage = true});
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CalculateFlags_SUB(GetSrcSize(Op), Dest, Src);
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CalculateFlags_SUB(OpSizeFromSrc(Op), Dest, Src);
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}
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void OpDispatchBuilder::CQOOp(OpcodeArgs) {
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@ -1391,7 +1391,7 @@ void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs, bool SHL1Bit) {
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Ref Src = _Constant(Size, Shift);
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Ref Result = _Lshl(Size == 64 ? OpSize::i64Bit : OpSize::i32Bit, Dest, Src);
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CalculateFlags_ShiftLeftImmediate(GetSrcSize(Op), Result, Dest, Shift);
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CalculateFlags_ShiftLeftImmediate(OpSizeFromSrc(Op), Result, Dest, Shift);
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CalculateDeferredFlags();
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StoreResult(GPRClass, Op, Result, OpSize::iInvalid);
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}
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@ -1414,7 +1414,7 @@ void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs, bool SHR1Bit) {
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Ref Src = _Constant(Size, Shift);
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auto ALUOp = _Lshr(Size == 64 ? OpSize::i64Bit : OpSize::i32Bit, Dest, Src);
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CalculateFlags_ShiftRightImmediate(GetSrcSize(Op), ALUOp, Dest, Shift);
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CalculateFlags_ShiftRightImmediate(OpSizeFromSrc(Op), ALUOp, Dest, Shift);
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CalculateDeferredFlags();
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StoreResult(GPRClass, Op, ALUOp, OpSize::iInvalid);
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}
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@ -1483,7 +1483,7 @@ void OpDispatchBuilder::SHLDImmediateOp(OpcodeArgs) {
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Res = _Extr(OpSizeFromSrc(Op), Dest, Src, Size - Shift);
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}
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CalculateFlags_ShiftLeftImmediate(GetSrcSize(Op), Res, Dest, Shift);
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CalculateFlags_ShiftLeftImmediate(OpSizeFromSrc(Op), Res, Dest, Shift);
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CalculateDeferredFlags();
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StoreResult(GPRClass, Op, Res, OpSize::iInvalid);
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} else if (Shift == 0 && Size == 32) {
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@ -1549,7 +1549,7 @@ void OpDispatchBuilder::SHRDImmediateOp(OpcodeArgs) {
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}
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StoreResult(GPRClass, Op, Res, OpSize::iInvalid);
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CalculateFlags_ShiftRightDoubleImmediate(GetSrcSize(Op), Res, Dest, Shift);
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CalculateFlags_ShiftRightDoubleImmediate(OpSizeFromSrc(Op), Res, Dest, Shift);
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} else if (Shift == 0 && Size == 32) {
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// Ensure Zext still occurs
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StoreResult(GPRClass, Op, Dest, OpSize::iInvalid);
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@ -1574,7 +1574,7 @@ void OpDispatchBuilder::ASHROp(OpcodeArgs, bool Immediate, bool SHR1Bit) {
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uint64_t Shift = LoadConstantShift(Op, SHR1Bit);
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Ref Result = _Ashr(IR::SizeToOpSize(OpSize), Dest, _Constant(Shift));
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CalculateFlags_SignShiftRightImmediate(GetSrcSize(Op), Result, Dest, Shift);
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CalculateFlags_SignShiftRightImmediate(OpSizeFromSrc(Op), Result, Dest, Shift);
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CalculateDeferredFlags();
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StoreResult(GPRClass, Op, Result, OpSize::iInvalid);
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} else {
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@ -1653,7 +1653,7 @@ void OpDispatchBuilder::ANDNBMIOp(OpcodeArgs) {
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auto Dest = _Andn(OpSizeFromSrc(Op), Src2, Src1);
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StoreResult(GPRClass, Op, Dest, OpSize::iInvalid);
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CalculateFlags_Logical(GetSrcSize(Op), Dest, Src1, Src2);
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CalculateFlags_Logical(OpSizeFromSrc(Op), Dest, Src1, Src2);
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}
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void OpDispatchBuilder::BEXTRBMIOp(OpcodeArgs) {
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@ -2535,27 +2535,27 @@ void OpDispatchBuilder::IMUL1SrcOp(OpcodeArgs) {
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Ref Src1 = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.AllowUpperGarbage = true});
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Ref Src2 = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.AllowUpperGarbage = true});
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uint8_t Size = GetSrcSize(Op);
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const auto Size = OpSizeFromSrc(Op);
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Ref Dest {};
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Ref ResultHigh {};
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switch (Size) {
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case 1:
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case 2: {
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case OpSize::i8Bit:
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case OpSize::i16Bit: {
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Src1 = _Sbfe(OpSize::i64Bit, Size * 8, 0, Src1);
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Src2 = _Sbfe(OpSize::i64Bit, Size * 8, 0, Src2);
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Dest = _Mul(OpSize::i64Bit, Src1, Src2);
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ResultHigh = _Sbfe(OpSize::i64Bit, Size * 8, Size * 8, Dest);
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break;
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}
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case 4: {
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case OpSize::i32Bit: {
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ResultHigh = _SMull(Src1, Src2);
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ResultHigh = _Sbfe(OpSize::i64Bit, Size * 8, Size * 8, ResultHigh);
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// Flipped order to save a move
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Dest = _Mul(OpSize::i32Bit, Src1, Src2);
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break;
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}
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case 8: {
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case OpSize::i64Bit: {
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ResultHigh = _MulH(OpSize::i64Bit, Src1, Src2);
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// Flipped order to save a move
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Dest = _Mul(OpSize::i64Bit, Src1, Src2);
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@ -2572,28 +2572,28 @@ void OpDispatchBuilder::IMUL2SrcOp(OpcodeArgs) {
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Ref Src1 = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.AllowUpperGarbage = true});
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Ref Src2 = LoadSource(GPRClass, Op, Op->Src[1], Op->Flags, {.AllowUpperGarbage = true});
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uint8_t Size = GetSrcSize(Op);
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const auto Size = OpSizeFromSrc(Op);
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Ref Dest {};
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Ref ResultHigh {};
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switch (Size) {
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case 1:
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case 2: {
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case OpSize::i8Bit:
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case OpSize::i16Bit: {
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Src1 = _Sbfe(OpSize::i64Bit, Size * 8, 0, Src1);
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Src2 = _Sbfe(OpSize::i64Bit, Size * 8, 0, Src2);
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Dest = _Mul(OpSize::i64Bit, Src1, Src2);
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ResultHigh = _Sbfe(OpSize::i64Bit, Size * 8, Size * 8, Dest);
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break;
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}
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case 4: {
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case OpSize::i32Bit: {
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ResultHigh = _SMull(Src1, Src2);
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ResultHigh = _Sbfe(OpSize::i64Bit, Size * 8, Size * 8, ResultHigh);
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// Flipped order to save a move
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Dest = _Mul(OpSize::i32Bit, Src1, Src2);
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break;
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}
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case 8: {
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case OpSize::i64Bit: {
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ResultHigh = _MulH(OpSize::i64Bit, Src1, Src2);
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// Flipped order to save a move
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Dest = _Mul(OpSize::i64Bit, Src1, Src2);
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@ -2764,7 +2764,7 @@ void OpDispatchBuilder::XADDOp(OpcodeArgs) {
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if (Op->Dest.IsGPR()) {
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// If this is a GPR then we can just do an Add
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Result = CalculateFlags_ADD(GetSrcSize(Op), Dest, Src);
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Result = CalculateFlags_ADD(OpSizeFromSrc(Op), Dest, Src);
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// Previous value in dest gets stored in src
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StoreResult(GPRClass, Op, Op->Src[0], Dest, OpSize::iInvalid);
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@ -2775,7 +2775,7 @@ void OpDispatchBuilder::XADDOp(OpcodeArgs) {
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HandledLock = Op->Flags & FEXCore::X86Tables::DecodeFlags::FLAG_LOCK;
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Dest = AppendSegmentOffset(Dest, Op->Flags);
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auto Before = _AtomicFetchAdd(OpSizeFromSrc(Op), Src, Dest);
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CalculateFlags_ADD(GetSrcSize(Op), Before, Src);
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CalculateFlags_ADD(OpSizeFromSrc(Op), Before, Src);
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StoreResult(GPRClass, Op, Op->Src[0], Before, OpSize::iInvalid);
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}
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}
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@ -3283,7 +3283,7 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
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auto Src1 = _LoadMemAutoTSO(GPRClass, Size, Dest_RDI, Size);
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auto Src2 = _LoadMemAutoTSO(GPRClass, Size, Dest_RSI, Size);
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CalculateFlags_SUB(GetSrcSize(Op), Src2, Src1);
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CalculateFlags_SUB(OpSizeFromSrc(Op), Src2, Src1);
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auto PtrDir = LoadDir(Size);
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@ -3372,7 +3372,7 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
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// Grab the sources from the last iteration so we can set flags.
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auto Src1 = LoadGPR(Core::CPUState::PF_AS_GREG);
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auto Src2 = LoadGPR(Core::CPUState::AF_AS_GREG);
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CalculateFlags_SUB(GetSrcSize(Op), Src2, Src1);
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CalculateFlags_SUB(OpSizeFromSrc(Op), Src2, Src1);
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}
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auto Jump_ = Jump();
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@ -3483,7 +3483,7 @@ void OpDispatchBuilder::SCASOp(OpcodeArgs) {
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auto Src1 = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.AllowUpperGarbage = true});
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auto Src2 = _LoadMemAutoTSO(GPRClass, Size, Dest_RDI, Size);
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CalculateFlags_SUB(GetSrcSize(Op), Src1, Src2);
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CalculateFlags_SUB(OpSizeFromSrc(Op), Src1, Src2);
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// Offset the pointer
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Ref TailDest_RDI = LoadGPRRegister(X86State::REG_RDI);
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@ -3521,7 +3521,7 @@ void OpDispatchBuilder::SCASOp(OpcodeArgs) {
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auto Src1 = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.AllowUpperGarbage = true});
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auto Src2 = _LoadMemAutoTSO(GPRClass, Size, Dest_RDI, Size);
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CalculateFlags_SUB(GetSrcSize(Op), Src1, Src2);
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CalculateFlags_SUB(OpSizeFromSrc(Op), Src1, Src2);
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// Calculate flags early.
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CalculateDeferredFlags();
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@ -3593,7 +3593,7 @@ void OpDispatchBuilder::POPFOp(OpcodeArgs) {
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void OpDispatchBuilder::NEGOp(OpcodeArgs) {
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HandledLock = (Op->Flags & FEXCore::X86Tables::DecodeFlags::FLAG_LOCK) != 0;
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auto Size = GetSrcSize(Op);
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const auto Size = OpSizeFromSrc(Op);
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auto ZeroConst = _Constant(0);
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if (DestIsLockedMem(Op)) {
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@ -3791,7 +3791,7 @@ void OpDispatchBuilder::CMPXCHGOp(OpcodeArgs) {
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}
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// Compare RAX with the destination, setting flags accordingly.
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CalculateFlags_SUB(GetSrcSize(Op), Src3, Src1Lower);
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CalculateFlags_SUB(OpSizeFromSrc(Op), Src3, Src1Lower);
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CalculateDeferredFlags();
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if (!Trivial) {
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@ -3840,7 +3840,7 @@ void OpDispatchBuilder::CMPXCHGOp(OpcodeArgs) {
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Ref CASResult = _CAS(IR::SizeToOpSize(Size), Src3Lower, Src2, Src1);
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Ref RAXResult = CASResult;
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CalculateFlags_SUB(GetSrcSize(Op), Src3Lower, CASResult);
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CalculateFlags_SUB(OpSizeFromSrc(Op), Src3Lower, CASResult);
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CalculateDeferredFlags();
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if (GPRSize == OpSize::i64Bit && Size == OpSize::i32Bit) {
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@ -4525,7 +4525,7 @@ void OpDispatchBuilder::ALUOp(OpcodeArgs, FEXCore::IR::IROps ALUIROp, FEXCore::I
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auto Result = _Constant(0);
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StoreResult(GPRClass, Op, Result, OpSize::iInvalid);
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CalculateFlags_Logical(GetSrcSize(Op), Result, Result, Result);
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CalculateFlags_Logical(OpSizeFromSrc(Op), Result, Result, Result);
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return;
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}
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@ -4732,7 +4732,7 @@ void OpDispatchBuilder::TZCNT(OpcodeArgs) {
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Src = _FindTrailingZeroes(OpSizeFromSrc(Op), Src);
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StoreResult(GPRClass, Op, Src, OpSize::iInvalid);
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CalculateFlags_ZCNT(GetSrcSize(Op), Src);
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CalculateFlags_ZCNT(OpSizeFromSrc(Op), Src);
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}
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void OpDispatchBuilder::LZCNT(OpcodeArgs) {
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@ -4741,7 +4741,7 @@ void OpDispatchBuilder::LZCNT(OpcodeArgs) {
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auto Res = _CountLeadingZeroes(OpSizeFromSrc(Op), Src);
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StoreResult(GPRClass, Op, Res, OpSize::iInvalid);
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CalculateFlags_ZCNT(GetSrcSize(Op), Res);
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CalculateFlags_ZCNT(OpSizeFromSrc(Op), Res);
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}
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void OpDispatchBuilder::MOVBEOp(OpcodeArgs) {
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@ -2326,22 +2326,22 @@ private:
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Ref IncrementByCarry(OpSize OpSize, Ref Src);
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void CalculateOF(uint8_t SrcSize, Ref Res, Ref Src1, Ref Src2, bool Sub);
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Ref CalculateFlags_ADC(uint8_t SrcSize, Ref Src1, Ref Src2);
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Ref CalculateFlags_SBB(uint8_t SrcSize, Ref Src1, Ref Src2);
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Ref CalculateFlags_SUB(uint8_t SrcSize, Ref Src1, Ref Src2, bool UpdateCF = true);
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Ref CalculateFlags_ADD(uint8_t SrcSize, Ref Src1, Ref Src2, bool UpdateCF = true);
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void CalculateFlags_MUL(uint8_t SrcSize, Ref Res, Ref High);
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void CalculateOF(IR::OpSize SrcSize, Ref Res, Ref Src1, Ref Src2, bool Sub);
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Ref CalculateFlags_ADC(IR::OpSize SrcSize, Ref Src1, Ref Src2);
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Ref CalculateFlags_SBB(IR::OpSize SrcSize, Ref Src1, Ref Src2);
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Ref CalculateFlags_SUB(IR::OpSize SrcSize, Ref Src1, Ref Src2, bool UpdateCF = true);
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Ref CalculateFlags_ADD(IR::OpSize SrcSize, Ref Src1, Ref Src2, bool UpdateCF = true);
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void CalculateFlags_MUL(IR::OpSize SrcSize, Ref Res, Ref High);
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void CalculateFlags_UMUL(Ref High);
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void CalculateFlags_Logical(uint8_t SrcSize, Ref Res, Ref Src1, Ref Src2);
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void CalculateFlags_ShiftLeft(uint8_t SrcSize, Ref Res, Ref Src1, Ref Src2);
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void CalculateFlags_ShiftLeftImmediate(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ShiftRight(uint8_t SrcSize, Ref Res, Ref Src1, Ref Src2);
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void CalculateFlags_ShiftRightImmediate(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ShiftRightDoubleImmediate(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ShiftRightImmediateCommon(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_SignShiftRightImmediate(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ZCNT(uint8_t SrcSize, Ref Result);
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void CalculateFlags_Logical(IR::OpSize SrcSize, Ref Res, Ref Src1, Ref Src2);
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void CalculateFlags_ShiftLeft(IR::OpSize SrcSize, Ref Res, Ref Src1, Ref Src2);
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void CalculateFlags_ShiftLeftImmediate(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ShiftRight(IR::OpSize SrcSize, Ref Res, Ref Src1, Ref Src2);
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void CalculateFlags_ShiftRightImmediate(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ShiftRightDoubleImmediate(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ShiftRightImmediateCommon(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_SignShiftRightImmediate(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift);
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void CalculateFlags_ZCNT(IR::OpSize SrcSize, Ref Result);
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/** @} */
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Ref AndConst(FEXCore::IR::OpSize Size, Ref Node, uint64_t Const) {
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@ -138,7 +138,7 @@ Ref OpDispatchBuilder::GetPackedRFLAG(uint32_t FlagsMask) {
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return Original;
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}
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void OpDispatchBuilder::CalculateOF(uint8_t SrcSize, Ref Res, Ref Src1, Ref Src2, bool Sub) {
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void OpDispatchBuilder::CalculateOF(IR::OpSize SrcSize, Ref Res, Ref Src1, Ref Src2, bool Sub) {
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auto OpSize = SrcSize == 8 ? OpSize::i64Bit : OpSize::i32Bit;
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uint64_t SignBit = (SrcSize * 8) - 1;
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Ref Anded = nullptr;
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@ -262,7 +262,7 @@ Ref OpDispatchBuilder::IncrementByCarry(OpSize OpSize, Ref Src) {
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return _NZCVSelectIncrement(OpSize, {CFInverted ? COND_UGE : COND_ULT}, Src, Src);
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}
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Ref OpDispatchBuilder::CalculateFlags_ADC(uint8_t SrcSize, Ref Src1, Ref Src2) {
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Ref OpDispatchBuilder::CalculateFlags_ADC(IR::OpSize SrcSize, Ref Src1, Ref Src2) {
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auto Zero = _InlineConstant(0);
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auto One = _InlineConstant(1);
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auto OpSize = SrcSize == 8 ? OpSize::i64Bit : OpSize::i32Bit;
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@ -299,7 +299,7 @@ Ref OpDispatchBuilder::CalculateFlags_ADC(uint8_t SrcSize, Ref Src1, Ref Src2) {
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return Res;
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}
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Ref OpDispatchBuilder::CalculateFlags_SBB(uint8_t SrcSize, Ref Src1, Ref Src2) {
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Ref OpDispatchBuilder::CalculateFlags_SBB(IR::OpSize SrcSize, Ref Src1, Ref Src2) {
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auto Zero = _InlineConstant(0);
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auto One = _InlineConstant(1);
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auto OpSize = SrcSize == 8 ? OpSize::i64Bit : OpSize::i32Bit;
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@ -335,7 +335,7 @@ Ref OpDispatchBuilder::CalculateFlags_SBB(uint8_t SrcSize, Ref Src1, Ref Src2) {
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return Res;
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}
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Ref OpDispatchBuilder::CalculateFlags_SUB(uint8_t SrcSize, Ref Src1, Ref Src2, bool UpdateCF) {
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Ref OpDispatchBuilder::CalculateFlags_SUB(IR::OpSize SrcSize, Ref Src1, Ref Src2, bool UpdateCF) {
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// Stash CF before stomping over it
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auto OldCFInv = UpdateCF ? nullptr : GetRFLAG(FEXCore::X86State::RFLAG_CF_RAW_LOC, true);
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@ -365,7 +365,7 @@ Ref OpDispatchBuilder::CalculateFlags_SUB(uint8_t SrcSize, Ref Src1, Ref Src2, b
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return Res;
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}
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Ref OpDispatchBuilder::CalculateFlags_ADD(uint8_t SrcSize, Ref Src1, Ref Src2, bool UpdateCF) {
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Ref OpDispatchBuilder::CalculateFlags_ADD(IR::OpSize SrcSize, Ref Src1, Ref Src2, bool UpdateCF) {
|
||||
// Stash CF before stomping over it
|
||||
auto OldCFInv = UpdateCF ? nullptr : GetRFLAG(FEXCore::X86State::RFLAG_CF_RAW_LOC, true);
|
||||
|
||||
@ -394,7 +394,7 @@ Ref OpDispatchBuilder::CalculateFlags_ADD(uint8_t SrcSize, Ref Src1, Ref Src2, b
|
||||
return Res;
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_MUL(uint8_t SrcSize, Ref Res, Ref High) {
|
||||
void OpDispatchBuilder::CalculateFlags_MUL(IR::OpSize SrcSize, Ref Res, Ref High) {
|
||||
HandleNZCVWrite();
|
||||
InvalidatePF_AF();
|
||||
|
||||
@ -427,7 +427,7 @@ void OpDispatchBuilder::CalculateFlags_UMUL(Ref High) {
|
||||
CFInverted = true;
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_Logical(uint8_t SrcSize, Ref Res, Ref Src1, Ref Src2) {
|
||||
void OpDispatchBuilder::CalculateFlags_Logical(IR::OpSize SrcSize, Ref Res, Ref Src1, Ref Src2) {
|
||||
InvalidateAF();
|
||||
|
||||
CalculatePF(Res);
|
||||
@ -436,7 +436,7 @@ void OpDispatchBuilder::CalculateFlags_Logical(uint8_t SrcSize, Ref Res, Ref Src
|
||||
SetNZ_ZeroCV(SrcSize, Res);
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftLeftImmediate(uint8_t SrcSize, Ref UnmaskedRes, Ref Src1, uint64_t Shift) {
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftLeftImmediate(IR::OpSize SrcSize, Ref UnmaskedRes, Ref Src1, uint64_t Shift) {
|
||||
// No flags changed if shift is zero
|
||||
if (Shift == 0) {
|
||||
return;
|
||||
@ -470,7 +470,7 @@ void OpDispatchBuilder::CalculateFlags_ShiftLeftImmediate(uint8_t SrcSize, Ref U
|
||||
}
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_SignShiftRightImmediate(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
void OpDispatchBuilder::CalculateFlags_SignShiftRightImmediate(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
// No flags changed if shift is zero
|
||||
if (Shift == 0) {
|
||||
return;
|
||||
@ -490,7 +490,7 @@ void OpDispatchBuilder::CalculateFlags_SignShiftRightImmediate(uint8_t SrcSize,
|
||||
// already zeroed there's nothing to do here.
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftRightImmediateCommon(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftRightImmediateCommon(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
// Set SF and PF. Clobbers OF, but OF only defined for Shift = 1 where it is
|
||||
// set below.
|
||||
SetNZ_ZeroCV(SrcSize, Res);
|
||||
@ -502,7 +502,7 @@ void OpDispatchBuilder::CalculateFlags_ShiftRightImmediateCommon(uint8_t SrcSize
|
||||
InvalidateAF();
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftRightImmediate(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftRightImmediate(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
// No flags changed if shift is zero
|
||||
if (Shift == 0) {
|
||||
return;
|
||||
@ -520,7 +520,7 @@ void OpDispatchBuilder::CalculateFlags_ShiftRightImmediate(uint8_t SrcSize, Ref
|
||||
}
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftRightDoubleImmediate(uint8_t SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
void OpDispatchBuilder::CalculateFlags_ShiftRightDoubleImmediate(IR::OpSize SrcSize, Ref Res, Ref Src1, uint64_t Shift) {
|
||||
// No flags changed if shift is zero
|
||||
if (Shift == 0) {
|
||||
return;
|
||||
@ -541,7 +541,7 @@ void OpDispatchBuilder::CalculateFlags_ShiftRightDoubleImmediate(uint8_t SrcSize
|
||||
}
|
||||
}
|
||||
|
||||
void OpDispatchBuilder::CalculateFlags_ZCNT(uint8_t SrcSize, Ref Result) {
|
||||
void OpDispatchBuilder::CalculateFlags_ZCNT(IR::OpSize SrcSize, Ref Result) {
|
||||
// OF, SF, AF, PF all undefined
|
||||
// Test ZF of result, SF is undefined so this is ok.
|
||||
SetNZ_ZeroCV(SrcSize, Result);
|
||||
|
Loading…
Reference in New Issue
Block a user