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JIT: Fixes broken register in VTBX1
If the Dst register is allocated as VectorIndices or VectorTable, using Dst as an operand to perform the tbx operation will result in an error. For example: %131(FPR0) i128 = LoadNamedVectorIndexedConstant u8:Tmp:RegisterSize, #0x6, #0xaa0 %132(FPR0) i128 = VTBX1 u8:Tmp:RegisterSize, %129(FPRFixed6) i32v4, %126(FPRFixed10) i16v8, %131(FPR0) i128 Since the tbx instruction's destination register is also the original operand, this is consistent with the semantics of VTBX1. Therefore, directly using VectorSrcDst as the destination operand for the tbx instruction is safe.
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@ -5009,42 +5009,50 @@ DEF_OP(VTBX1) {
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if (Dst != VectorSrcDst) {
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switch (OpSize) {
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case 8: {
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mov(Dst.D(), VectorSrcDst.D());
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mov(VTMP1.D(), VectorSrcDst.D());
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tbx(VTMP1.D(), VectorTable.Q(), VectorIndices.D());
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mov(Dst.D(), VTMP1.D());
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break;
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}
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case 16: {
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mov(Dst.Q(), VectorSrcDst.Q());
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mov(VTMP1.Q(), VectorSrcDst.Q());
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tbx(VTMP1.Q(), VectorTable.Q(), VectorIndices.Q());
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mov(Dst.Q(), VTMP1.Q());
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break;
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}
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case 32: {
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mov(Dst.Z(), VectorSrcDst.Z());
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LOGMAN_THROW_AA_FMT(HostSupportsSVE256,
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"Host does not support SVE. Cannot perform 256-bit table lookup");
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mov(VTMP1.Z(), VectorSrcDst.Z());
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tbx(ARMEmitter::SubRegSize::i8Bit, VTMP1.Z(), VectorTable.Z(), VectorIndices.Z());
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mov(Dst.Z(), VTMP1.Z());
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break;
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}
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default:
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LOGMAN_MSG_A_FMT("Unknown OpSize: {}", OpSize);
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break;
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}
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}
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} else {
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switch (OpSize) {
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case 8: {
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tbx(VectorSrcDst.D(), VectorTable.Q(), VectorIndices.D());
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break;
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}
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case 16: {
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tbx(VectorSrcDst.Q(), VectorTable.Q(), VectorIndices.Q());
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break;
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}
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case 32: {
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LOGMAN_THROW_AA_FMT(HostSupportsSVE256,
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"Host does not support SVE. Cannot perform 256-bit table lookup");
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switch (OpSize) {
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case 8: {
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tbx(Dst.D(), VectorTable.Q(), VectorIndices.D());
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break;
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tbx(ARMEmitter::SubRegSize::i8Bit, VectorSrcDst.Z(), VectorTable.Z(), VectorIndices.Z());
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break;
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}
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default:
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LOGMAN_MSG_A_FMT("Unknown OpSize: {}", OpSize);
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break;
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}
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case 16: {
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tbx(Dst.Q(), VectorTable.Q(), VectorIndices.Q());
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break;
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}
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case 32: {
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LOGMAN_THROW_AA_FMT(HostSupportsSVE256,
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"Host does not support SVE. Cannot perform 256-bit table lookup");
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tbx(ARMEmitter::SubRegSize::i8Bit, Dst.Z(), VectorTable.Z(), VectorIndices.Z());
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break;
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}
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default:
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LOGMAN_MSG_A_FMT("Unknown OpSize: {}", OpSize);
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break;
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}
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}
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