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OpcodeDispatcher: optimize variable shifts

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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig 2024-08-10 12:11:07 -04:00
parent 34301319bf
commit 5631ff4fd5
3 changed files with 7 additions and 7 deletions
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5
FEXCore/Source/Interface/Core/JIT/Arm64/ALUOps.cpp
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@ -663,6 +663,11 @@ DEF_OP(ShiftFlags) {
lsrv(EmitSize, CFWord, Src1, CFWord);
}
if (Op->InvertCF) {
mvn(ARMEmitter::Size::i64Bit, TMP1, CFWord);
CFWord = TMP1;
}
bool SetOF = Op->Shift != IR::ShiftType::ASR;
if (SetOF) {
// Only defined when Shift is 1 else undefined

7
FEXCore/Source/Interface/Core/OpcodeDispatcher.h
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@ -2119,12 +2119,7 @@ private:
auto OldPF = GetRFLAG(X86State::RFLAG_PF_RAW_LOC);
HandleNZCV_RMW();
// TODO: Find a smarter way to handle CF invert for ShiftFlags.
RectifyCarryInvert(false);
CalculatePF(_ShiftFlags(OpSizeFromSrc(Op), Result, Dest, Shift, Src, OldPF));
CFInverted = false;
CalculatePF(_ShiftFlags(OpSizeFromSrc(Op), Result, Dest, Shift, Src, OldPF, CFInverted));
StoreResult(GPRClass, Op, Result, -1);
}

2
FEXCore/Source/Interface/IR/IR.json
View File

@ -1296,7 +1296,7 @@
"Size == FEXCore::IR::OpSize::i32Bit || Size == FEXCore::IR::OpSize::i64Bit"
]
},
"GPR = ShiftFlags OpSize:$Size, GPR:$Result, GPR:$Src1, ShiftType:$Shift, GPR:$Src2, GPR:$PFInput": {
"GPR = ShiftFlags OpSize:$Size, GPR:$Result, GPR:$Src1, ShiftType:$Shift, GPR:$Src2, GPR:$PFInput, i1:$InvertCF": {
"Desc": ["Set NZCV flags for specified variable integer shift with given result.",
"Returns updated raw PF."],
"HasSideEffects": true,