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IR: Change VSXTL2 to use IR::OpSize

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Ryan Houdek 2024-10-27 23:21:49 -07:00
parent 0692b34192
commit 5ab41056ab
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1 changed files with 1 additions and 1 deletions
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FEXCore/Source/Interface/IR/IR.json
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@ -2033,7 +2033,7 @@
"DestSize": "RegisterSize",
"NumElements": "RegisterSize / (ElementSize << 1)"
},
"FPR = VSXTL2 u8:#RegisterSize, u8:#ElementSize, FPR:$Vector": {
"FPR = VSXTL2 OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Vector": {
"Desc": ["Sign extends elements from the source element size to the next size up",
"Source elements come from the upper half of the register"
],