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OpcodeDispatcher: Handle VUNPCKHPS
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6bc1c3fc30
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@ -5819,6 +5819,8 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
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{OPD(1, 0b00, 0x14), 1, &OpDispatchBuilder::VPUNPCKLOp<4>},
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{OPD(1, 0b01, 0x14), 1, &OpDispatchBuilder::VPUNPCKLOp<8>},
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{OPD(1, 0b00, 0x15), 1, &OpDispatchBuilder::VPUNPCKHOp<4>},
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{OPD(1, 0b00, 0x16), 1, &OpDispatchBuilder::VMOVHPOp},
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{OPD(1, 0b01, 0x16), 1, &OpDispatchBuilder::VMOVHPOp},
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{OPD(1, 0b10, 0x16), 1, &OpDispatchBuilder::VMOVSHDUPOp},
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@ -492,6 +492,9 @@ public:
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void VPSRLDOp(OpcodeArgs);
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void VPSRLDQOp(OpcodeArgs);
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template <size_t ElementSize>
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void VPUNPCKHOp(OpcodeArgs);
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template <size_t ElementSize>
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void VPUNPCKLOp(OpcodeArgs);
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@ -933,6 +933,30 @@ void OpDispatchBuilder::PUNPCKHOp<4>(OpcodeArgs);
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template
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void OpDispatchBuilder::PUNPCKHOp<8>(OpcodeArgs);
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template <size_t ElementSize>
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void OpDispatchBuilder::VPUNPCKHOp(OpcodeArgs) {
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const auto SrcSize = GetSrcSize(Op);
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const auto Is128Bit = SrcSize == Core::CPUState::XMM_SSE_REG_SIZE;
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OrderedNode *Src1 = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags, -1);
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OrderedNode *Src2 = LoadSource(FPRClass, Op, Op->Src[1], Op->Flags, -1);
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OrderedNode *Result{};
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if (Is128Bit) {
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Result = _VZip2(SrcSize, ElementSize, Src1, Src2);
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} else {
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OrderedNode *ZipLo = _VZip(SrcSize, ElementSize, Src1, Src2);
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OrderedNode *ZipHi = _VZip2(SrcSize, ElementSize, Src1, Src2);
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Result = _VInsElement(SrcSize, 16, 0, 1, ZipHi, ZipLo);
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}
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StoreResult(FPRClass, Op, Result, -1);
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}
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template
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void OpDispatchBuilder::VPUNPCKHOp<4>(OpcodeArgs);
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void OpDispatchBuilder::PSHUFBOp(OpcodeArgs) {
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auto Size = GetSrcSize(Op);
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OrderedNode *Dest = LoadSource(FPRClass, Op, Op->Dest, Op->Flags, -1);
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@ -38,7 +38,7 @@ void InitializeVEXTables() {
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{OPD(1, 0b00, 0x14), 1, X86InstInfo{"VUNPCKLPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
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{OPD(1, 0b01, 0x14), 1, X86InstInfo{"VUNPCKLPD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
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{OPD(1, 0b00, 0x15), 1, X86InstInfo{"VUNPCKHPS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
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{OPD(1, 0b00, 0x15), 1, X86InstInfo{"VUNPCKHPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
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{OPD(1, 0b01, 0x15), 1, X86InstInfo{"VUNPCKHPD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
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{OPD(1, 0b00, 0x16), 1, X86InstInfo{"VMOVHPS", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_SF_MOD_MEM_ONLY | FLAGS_XMM_FLAGS | FLAGS_VEX_1ST_SRC, 0, nullptr}},
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39
unittests/ASM/VEX/vunpckhps.asm
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39
unittests/ASM/VEX/vunpckhps.asm
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@ -0,0 +1,39 @@
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%ifdef CONFIG
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{
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"HostFeatures": ["AVX"],
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"RegData": {
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"XMM2": ["0x7576777855565758", "0x7172737451525354", "0x0000000000000000", "0x0000000000000000"],
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"XMM3": ["0x7576777855565758", "0x7172737451525354", "0x0000000000000000", "0x0000000000000000"],
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"XMM4": ["0x7576777855565758", "0x7172737451525354", "0x88888888CCCCCCCC", "0x99999999DDDDDDDD"],
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"XMM5": ["0x7576777855565758", "0x7172737451525354", "0x88888888CCCCCCCC", "0x99999999DDDDDDDD"]
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},
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"MemoryRegions": {
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"0x100000000": "4096"
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}
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}
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%endif
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lea rdx, [rel .data]
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vmovaps ymm0, [rdx]
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vmovaps ymm1, [rdx + 32]
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vunpckhps xmm2, xmm0, xmm1
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vunpckhps xmm3, xmm0, [rdx + 32]
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vunpckhps ymm4, ymm0, ymm1
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vunpckhps ymm5, ymm0, [rdx + 32]
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hlt
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align 32
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.data:
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dq 0x4142434445464748
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dq 0x5152535455565758
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dq 0xFFFFFFFFEEEEEEEE
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dq 0xDDDDDDDDCCCCCCCC
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dq 0x6162636465666768
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dq 0x7172737475767778
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dq 0xBBBBBBBBAAAAAAAA
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dq 0x9999999988888888
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