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ARM64/JITClass: include dependencies

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Includes dependencies directly used by the class. Also qualifies the
vixl includes with <> instead of quotes.
This commit is contained in:
lioncash 2022-06-13 10:43:10 -04:00
parent ffcde1823b
commit 64b3cef126
1 changed files with 9 additions and 6 deletions
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15
External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h vendored
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@ -9,14 +9,19 @@ $end_info$
#include "Interface/Core/ArchHelpers/Arm64Emitter.h"
#include "Interface/Core/Dispatcher/Dispatcher.h"
#include "aarch64/assembler-aarch64.h"
#include "aarch64/disasm-aarch64.h"
#include "aarch64/assembler-aarch64.h"
#include <aarch64/assembler-aarch64.h>
#include <aarch64/disasm-aarch64.h>
#include <FEXCore/Core/CPUBackend.h>
#include <FEXCore/IR/IR.h>
#include <FEXCore/IR/IntrusiveIRList.h>
#include <array>
#include <cstdint>
#include <map>
#include <utility>
#include <vector>
#define STATE x28
#define TMP1 x0
#define TMP2 x1
@ -471,6 +476,4 @@ private:
#undef DEF_OP
};
}
} // namespace FEXCore::CPU