Add some ir tests to formalize ALU truncation

unittests/IR/Basic/Sbfe.ir

@@ -0,0 +1,41 @@
+;%ifdef CONFIG
+;{
+;  "RegData": {
+;    "RAX": "0xffffffffffffff80",
+;    "RBX": "0xffffffffffff8080",
+;    "RCX": "0xffffffff80008080",
+;    "RDX": "0xfffffffffffffff0",
+;    "RSI": "0xfffffffffffffffc"
+;  },
+;  "MemoryRegions": {
+;    "0x1000000": "4096"
+;  },
+;  "MemoryData": {
+;    "0x1000000": "0x0000000080008080",
+;    "0x1000008": "0x0000000000000030"
+;  }
+;}
+;%endif
+
+(%ssa1) IRHeader #0x1000, %ssa2, #0
+  (%ssa2) CodeBlock %start, %end, %ssa1
+    (%start i0) Dummy
+    %Addr1 i64 = Constant #0x1000000
+    %Val i64 = LoadMem %Addr1 i64, #0x8, #0x8, GPR
+; Test aligned special cases
+    %Res1 i64 = Sbfe %Val, #0x8, #0x0
+    (%Store1 i64) StoreContext %Res1 i64, #0x08, GPR
+    %Res2 i64 = Sbfe %Val, #0x10, #0x0
+    (%Store2 i64) StoreContext %Res2 i64, #0x10, GPR
+    %Res3 i64 = Sbfe %Val, #0x20, #0x0
+    (%Store3 i64) StoreContext %Res3 i64, #0x18, GPR
+    %Addr2 i64 = Constant #0x1000008
+; Test non special width
+    %Val2 i64 = LoadMem %Addr2 i64, #0x8, #0x8, GPR
+    %Res4 i64 = Sbfe %Val2, #0x6, #0x0
+    (%Store4 i64) StoreContext %Res4 i64, #0x20, GPR
+; Test with + shift
+    %Res5 i64 = Sbfe %Val2, #0x4, #0x2
+    (%Store5 i64) StoreContext %Res5 i64, #0x28, GPR
+    (%brk i0) Break #4, #4
+    (%end i0) EndBlock #0x0

unittests/IR/CMakeLists.txt

@@ -20,13 +20,10 @@ foreach(IR_SRC ${IR_SOURCES})
 
   list(APPEND IR_DEPENDS "${OUTPUT_CONFIG_NAME}")
 
+  # Since we pass in raw IR, we don't need to worry about various IR gen options
   set(TEST_ARGS
-    "-c irint -n 1"      "ir_int_1"
-    "-c irint -n 500"    "ir_int_500"
-    "-c irint -n 500 -m" "ir_int_500_m"
-    "-c irjit -n 1"      "ir_jit_1"
-    "-c irjit -n 500"    "ir_jit_500"
-    "-c irjit -n 500 -m" "ir_jit_500_m"
+    "-c irint -n 500" "ir_int"
+    "-c irjit -n 500" "ir_jit"
     )
 
   list(LENGTH TEST_ARGS ARG_COUNT)

unittests/IR/Correctness/AddTruncate.ir

@@ -0,0 +1,38 @@
+;%ifdef CONFIG
+;{
+;  "RegData": {
+;    "RAX": "0x00000000fffffff9",
+;    "RBX": "0xfffffffffffffff9",
+;    "RCX": "0x00000000fffffff9",
+;    "RDX": "0xfffffffffffffff9"
+;  },
+;  "MemoryRegions": {
+;    "0x1000000": "4096"
+;  },
+;  "MemoryData": {
+;    "0x1000000": "0xaaaaaaaaaaaaaaa8",
+;    "0x1000010": "51 55 55 55 55 55 55 55"
+;  }
+;}
+;%endif
+
+(%ssa1) IRHeader #0x1000, %ssa2, #0
+  (%ssa2) CodeBlock %ssa6, %ssa12, %ssa1
+    (%ssa6 i0) Dummy
+    %AddrA i64 = Constant #0x1000000
+    %MemValueA i64 = LoadMem %AddrA i64, #0x8, #0x8, GPR
+    %AddrB i64 = Constant #0x1000010
+    %MemValueB i64 = LoadMem %AddrB i64, #0x8, #0x8, GPR
+    %ResultA i32 = Add %MemValueA, %MemValueB
+    %ResultB i64 = Add %MemValueA, %MemValueB
+    (%Store i64) StoreContext %ResultA i64, #0x08, GPR
+    (%Store i64) StoreContext %ResultB i64, #0x10, GPR
+;  Constant optimisable version
+    %ValueC i64 = Constant #0xaaaaaaaaaaaaaaa8
+    %ValueD i64 = Constant #0x5555555555555551
+    %ResultC i32 = Add %ValueC, %ValueD
+    %ResultD i64 = Add %ValueC, %ValueD
+    (%Store i64) StoreContext %ResultC i64, #0x18, GPR
+    (%Store i64) StoreContext %ResultD i64, #0x20, GPR
+    (%ssa7 i0) Break #4, #4
+    (%ssa12 i0) EndBlock #0x0

unittests/IR/Correctness/LeftShiftTruncate.ir

@@ -0,0 +1,36 @@
+;%ifdef CONFIG
+;{
+;  "RegData": {
+;    "RAX": "0x000000000eca8642",
+;    "RBX": "0x000000010eca8642",
+;    "RCX": "0x000000000eca8642",
+;    "RDX": "0x000000010eca8642"
+;  },
+;  "MemoryRegions": {
+;    "0x1000000": "4096"
+;  },
+;  "MemoryData": {
+;    "0x1000000": "0x87654321",
+;    "0x1000010": "51 55 55 55 55 55 55 55"
+;  }
+;}
+;%endif
+
+(%ssa1) IRHeader #0x1000, %ssa2, #0
+  (%ssa2) CodeBlock %ssa6, %ssa12, %ssa1
+    (%ssa6 i0) Dummy
+    %AddrA i64 = Constant #0x1000000
+    %MemValueA i32 = LoadMem %AddrA i64, #0x4, #0x4, GPR
+    %Shift i64 = Constant #0x1
+    %ResultA i32 = Lshl %MemValueA, %Shift
+    %ResultB i64 = Lshl %MemValueA, %Shift
+    (%Store i64) StoreContext %ResultA i64, #0x08, GPR
+    (%Store i64) StoreContext %ResultB i64, #0x10, GPR
+;  Constant optimisable version
+    %ValueB i64 = Constant #0x87654321
+    %ResultC i32 = Lshl %ValueB, %Shift
+    %ResultD i64 = Lshl %ValueB, %Shift
+    (%Store i64) StoreContext %ResultC i64, #0x18, GPR
+    (%Store i64) StoreContext %ResultD i64, #0x20, GPR
+    (%ssa7 i0) Break #4, #4
+    (%ssa12 i0) EndBlock #0x0

unittests/IR/Correctness/SubTruncate.ir

@@ -0,0 +1,38 @@
+;%ifdef CONFIG
+;{
+;  "RegData": {
+;    "RAX": "0x0000000055555557",
+;    "RBX": "0x5555555555555557",
+;    "RCX": "0x0000000055555557",
+;    "RDX": "0x5555555555555557"
+;  },
+;  "MemoryRegions": {
+;    "0x1000000": "4096"
+;  },
+;  "MemoryData": {
+;    "0x1000000": "0xaaaaaaaaaaaaaaa8",
+;    "0x1000010": "51 55 55 55 55 55 55 55"
+;  }
+;}
+;%endif
+
+(%ssa1) IRHeader #0x1000, %ssa2, #0
+  (%ssa2) CodeBlock %ssa6, %ssa12, %ssa1
+    (%ssa6 i0) Dummy
+    %AddrA i64 = Constant #0x1000000
+    %MemValueA i64 = LoadMem %AddrA i64, #0x8, #0x8, GPR
+    %AddrB i64 = Constant #0x1000010
+    %MemValueB i64 = LoadMem %AddrB i64, #0x8, #0x8, GPR
+    %ResultA i32 = Sub %MemValueA, %MemValueB
+    %ResultB i64 = Sub %MemValueA, %MemValueB
+    (%Store i64) StoreContext %ResultA i64, #0x08, GPR
+    (%Store i64) StoreContext %ResultB i64, #0x10, GPR
+;  Constant optimisable version
+    %ValueC i64 = Constant #0xaaaaaaaaaaaaaaa8
+    %ValueD i64 = Constant #0x5555555555555551
+    %ResultC i32 = Sub %ValueC, %ValueD
+    %ResultD i64 = Sub %ValueC, %ValueD
+    (%Store i64) StoreContext %ResultC i64, #0x18, GPR
+    (%Store i64) StoreContext %ResultD i64, #0x20, GPR
+    (%ssa7 i0) Break #4, #4
+    (%ssa12 i0) EndBlock #0x0