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AVX128: Implement support for round{ss,sd}
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@ -1139,6 +1139,8 @@ public:
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template<size_t ElementSize>
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void AVX128_VectorRound(OpcodeArgs);
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template<size_t ElementSize>
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void AVX128_InsertScalarRound(OpcodeArgs);
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// End of AVX 128-bit implementation
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@ -341,8 +341,8 @@ void OpDispatchBuilder::InstallAVX128Handlers() {
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// TODO: {OPD(3, 0b01, 0x06), 1, &OpDispatchBuilder::VPERM2Op},
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{OPD(3, 0b01, 0x08), 1, &OpDispatchBuilder::AVX128_VectorRound<4>},
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{OPD(3, 0b01, 0x09), 1, &OpDispatchBuilder::AVX128_VectorRound<8>},
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// TODO: {OPD(3, 0b01, 0x0A), 1, &OpDispatchBuilder::AVXInsertScalarRound<4>},
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// TODO: {OPD(3, 0b01, 0x0B), 1, &OpDispatchBuilder::AVXInsertScalarRound<8>},
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{OPD(3, 0b01, 0x0A), 1, &OpDispatchBuilder::AVX128_InsertScalarRound<4>},
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{OPD(3, 0b01, 0x0B), 1, &OpDispatchBuilder::AVX128_InsertScalarRound<8>},
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// TODO: {OPD(3, 0b01, 0x0C), 1, &OpDispatchBuilder::VPBLENDDOp},
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// TODO: {OPD(3, 0b01, 0x0D), 1, &OpDispatchBuilder::VBLENDPDOp},
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// TODO: {OPD(3, 0b01, 0x0E), 1, &OpDispatchBuilder::VPBLENDWOp},
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@ -1696,4 +1696,26 @@ void OpDispatchBuilder::AVX128_VectorRound(OpcodeArgs) {
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[this, Mode](size_t, Ref Src) { return VectorRoundImpl(OpSize::i128Bit, ElementSize, Src, Mode); });
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}
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template<size_t ElementSize>
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void OpDispatchBuilder::AVX128_InsertScalarRound(OpcodeArgs) {
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// We load the full vector width when dealing with a source vector,
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// so that we don't do any unnecessary zero extension to the scalar
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// element that we're going to operate on.
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const auto SrcSize = GetSrcSize(Op);
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auto Src1 = AVX128_LoadSource_WithOpSize(Op, Op->Src[0], Op->Flags, false);
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RefPair Src2 {};
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if (Op->Src[1].IsGPR()) {
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Src2 = AVX128_LoadSource_WithOpSize(Op, Op->Src[1], Op->Flags, false);
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} else {
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Src2.Low = LoadSource_WithOpSize(FPRClass, Op, Op->Src[1], SrcSize, Op->Flags);
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}
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// If OpSize == ElementSize then it only does the lower scalar op
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const auto SourceMode = TranslateRoundType(Op->Src[2].Literal());
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Ref Result = _VFToIScalarInsert(OpSize::i128Bit, ElementSize, Src1.Low, Src2.Low, SourceMode, false);
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AVX128_StoreResult_WithOpSize(Op, Op->Dest, AVX128_Zext(Result));
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}
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} // namespace FEXCore::IR
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