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InstCountCI: Update

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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig 2024-07-16 14:45:05 -04:00
parent e7d5a01c5f
commit 7546160811
28 changed files with 2734 additions and 2734 deletions
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28
unittests/InstructionCountCI/AVX128/VEX_map1.json
View File

@ -516,7 +516,7 @@
],
"ExpectedArm64ASM": [
"ushr v2.4s, v16.4s, #31",
"ldr q3, [x28, #2512]",
"ldr q3, [x28, #2464]",
"ushl v2.4s, v2.4s, v3.4s",
"addv s2, v2.4s",
"mov w4, v2.s[0]"
@ -530,7 +530,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #16]",
"ushr v3.4s, v16.4s, #31",
"ldr q4, [x28, #2512]",
"ldr q4, [x28, #2464]",
"ushl v3.4s, v3.4s, v4.4s",
"addv s3, v3.4s",
"mov w20, v3.s[0]",
@ -2537,7 +2537,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"movi v2.2d, #0x0",
@ -2552,7 +2552,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q4, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@ -2565,7 +2565,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"movi v2.2d, #0x0",
@ -2580,7 +2580,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q4, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@ -2593,7 +2593,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b",
"movi v2.2d, #0x0",
@ -2608,7 +2608,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q4, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v4.16b",
"tbl v2.16b, {v2.16b, v3.16b}, v4.16b",
@ -4098,7 +4098,7 @@
"Map 1 0b01 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.2d, v17.2d, v2.2d",
"movi v2.2d, #0x0",
@ -4113,7 +4113,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #2416]",
"ldr q4, [x28, #2368]",
"eor v5.16b, v18.16b, v4.16b",
"fadd v16.2d, v17.2d, v5.2d",
"eor v3.16b, v3.16b, v4.16b",
@ -4127,7 +4127,7 @@
"Map 1 0b11 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.4s, v17.4s, v2.4s",
"movi v2.2d, #0x0",
@ -4142,7 +4142,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #2384]",
"ldr q4, [x28, #2336]",
"eor v5.16b, v18.16b, v4.16b",
"fadd v16.4s, v17.4s, v5.4s",
"eor v3.16b, v3.16b, v4.16b",
@ -4318,7 +4318,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2640]",
"ldr q2, [x28, #2592]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
@ -4334,7 +4334,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #16]",
"ldr q3, [x28, #2640]",
"ldr q3, [x28, #2592]",
"cmlt v4.16b, v16.16b, #0",
"and v4.16b, v4.16b, v3.16b",
"addp v4.16b, v4.16b, v4.16b",

50
unittests/InstructionCountCI/AVX128/VEX_map2.json
View File

@ -1964,7 +1964,7 @@
"Map 2 0b01 0x41 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2352]",
"ldr q2, [x28, #2304]",
"zip1 v3.8h, v2.8h, v17.8h",
"zip2 v2.8h, v2.8h, v17.8h",
"umin v2.4s, v3.4s, v2.4s",
@ -4548,7 +4548,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -4566,7 +4566,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2384]",
"ldr q5, [x28, #2336]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -4582,7 +4582,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -4600,7 +4600,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2416]",
"ldr q5, [x28, #2368]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -4616,7 +4616,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -4634,7 +4634,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2448]",
"ldr q5, [x28, #2400]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -4650,7 +4650,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -4668,7 +4668,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2480]",
"ldr q5, [x28, #2432]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -5656,7 +5656,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -5674,7 +5674,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2384]",
"ldr q5, [x28, #2336]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -5690,7 +5690,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -5708,7 +5708,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2416]",
"ldr q5, [x28, #2368]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -5724,7 +5724,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -5742,7 +5742,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2448]",
"ldr q5, [x28, #2400]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -5758,7 +5758,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -5776,7 +5776,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2480]",
"ldr q5, [x28, #2432]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -5792,7 +5792,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -5809,7 +5809,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2384]",
"ldr q5, [x28, #2336]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -5824,7 +5824,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@ -5841,7 +5841,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2416]",
"ldr q5, [x28, #2368]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
@ -5856,7 +5856,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -5873,7 +5873,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2448]",
"ldr q5, [x28, #2400]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -5888,7 +5888,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@ -5905,7 +5905,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2480]",
"ldr q5, [x28, #2432]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",

48
unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json
View File

@ -2850,7 +2850,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -2868,7 +2868,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2384]",
"ldr q5, [x28, #2336]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -2884,7 +2884,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -2902,7 +2902,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2416]",
"ldr q5, [x28, #2368]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -2918,7 +2918,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -2936,7 +2936,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2448]",
"ldr q5, [x28, #2400]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
@ -2952,7 +2952,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -2970,7 +2970,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2480]",
"ldr q5, [x28, #2432]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
@ -3938,7 +3938,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -3956,7 +3956,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2384]",
"ldr q5, [x28, #2336]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -3972,7 +3972,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -3990,7 +3990,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2416]",
"ldr q5, [x28, #2368]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -4006,7 +4006,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -4024,7 +4024,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2448]",
"ldr q5, [x28, #2400]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
@ -4040,7 +4040,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -4058,7 +4058,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2480]",
"ldr q5, [x28, #2432]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
@ -4074,7 +4074,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -4091,7 +4091,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2384]",
"ldr q5, [x28, #2336]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -4106,7 +4106,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@ -4123,7 +4123,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2416]",
"ldr q5, [x28, #2368]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
@ -4138,7 +4138,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -4155,7 +4155,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2448]",
"ldr q5, [x28, #2400]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
@ -4170,7 +4170,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
@ -4187,7 +4187,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2480]",
"ldr q5, [x28, #2432]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",

64
unittests/InstructionCountCI/AVX128/VEX_map3.json
View File

@ -3867,7 +3867,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3882,7 +3882,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3897,7 +3897,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3912,7 +3912,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3927,7 +3927,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3942,7 +3942,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3957,7 +3957,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3972,7 +3972,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -3987,7 +3987,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4002,7 +4002,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4017,7 +4017,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4032,7 +4032,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4047,7 +4047,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4062,7 +4062,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4077,7 +4077,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4092,7 +4092,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4107,7 +4107,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4122,7 +4122,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4137,7 +4137,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4152,7 +4152,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4167,7 +4167,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4182,7 +4182,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4197,7 +4197,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4212,7 +4212,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4227,7 +4227,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4242,7 +4242,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4257,7 +4257,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4272,7 +4272,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4287,7 +4287,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4302,7 +4302,7 @@
"str x20, [x28, #272]",
"mov w1, #0x401",
"str x1, [x28, #1328]",
"ldr x0, [x28, #2296]",
"ldr x0, [x28, #2240]",
"br x0"
]
},
@ -4313,7 +4313,7 @@
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"ldr q3, [x28, #2528]",
"ldr q3, [x28, #2480]",
"mov v16.16b, v17.16b",
"unimplemented (Unimplemented)",
"tbl v16.16b, {v16.16b}, v3.16b",
@ -4327,7 +4327,7 @@
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"ldr q3, [x28, #2528]",
"ldr q3, [x28, #2480]",
"mov v16.16b, v17.16b",
"unimplemented (Unimplemented)",
"tbl v16.16b, {v16.16b}, v3.16b",

4
unittests/InstructionCountCI/Crypto/H0F3A.json
View File

@ -55,7 +55,7 @@
"0x66 0x0f 0x3a 0xdf"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2528]",
"ldr q2, [x28, #2480]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"unimplemented (Unimplemented)",
@ -68,7 +68,7 @@
"0x66 0x0f 0x3a 0xdf"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2528]",
"ldr q2, [x28, #2480]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"unimplemented (Unimplemented)",

6
unittests/InstructionCountCI/FEXOpt/libnss.json
View File

@ -197,10 +197,10 @@
"ldr q19, [x11, #272]",
"ldr q24, [x11]",
"ldr q23, [x11, #16]",
"ldr x0, [x28, #2048]",
"ldr x0, [x28, #1992]",
"ldr q2, [x0, #2832]",
"tbl v16.16b, {v18.16b}, v2.16b",
"ldr x0, [x28, #2048]",
"ldr x0, [x28, #1992]",
"ldr q3, [x0, #432]",
"tbl v18.16b, {v19.16b}, v3.16b",
"ldr q22, [x11, #32]",
@ -284,7 +284,7 @@
"mov v4.s[1], w21",
"mov v20.16b, v4.16b",
"mov v20.s[0], w23",
"ldr x0, [x28, #2048]",
"ldr x0, [x28, #1992]",
"ldr q4, [x0, #224]",
"tbl v16.16b, {v16.16b}, v4.16b",
"mov w21, v20.s[1]",

2
unittests/InstructionCountCI/FlagM/HotBlocks.json
View File

@ -243,7 +243,7 @@
"mov x2, v17.d[0]",
"mov x3, v17.d[1]",
"mov w4, #0xd",
"ldr x5, [x28, #1816]",
"ldr x5, [x28, #1760]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",

2
unittests/InstructionCountCI/FlagM/Secondary.json
View File

@ -1610,7 +1610,7 @@
"Comment": "0x0f 0xd7",
"ExpectedArm64ASM": [
"ldr d2, [x28, #1040]",
"ldr d3, [x28, #2640]",
"ldr d3, [x28, #2592]",
"cmlt v2.16b, v2.16b, #0",
"and v2.16b, v2.16b, v3.16b",
"addp v2.16b, v2.16b, v2.16b",

2
unittests/InstructionCountCI/FlagM/Secondary_OpSize.json
View File

@ -39,7 +39,7 @@
"ExpectedInstructionCount": 7,
"Comment": "0x66 0x0f 0xd7",
"ExpectedArm64ASM": [
"ldr q2, [x28, #2640]",
"ldr q2, [x28, #2592]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",

4
unittests/InstructionCountCI/FlagM/VEX_map1.json
View File

@ -72,7 +72,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2640]",
"ldr q2, [x28, #2592]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
@ -87,7 +87,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1968]",
"ldr x0, [x28, #1912]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",

204
unittests/InstructionCountCI/FlagM/x87-HalfLife.json
View File

@ -202,7 +202,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -325,7 +325,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -483,7 +483,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -593,7 +593,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -716,7 +716,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -838,7 +838,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -889,7 +889,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -945,7 +945,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1001,7 +1001,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1057,7 +1057,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1105,7 +1105,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1197,7 +1197,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1241,7 +1241,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1333,7 +1333,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1377,7 +1377,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1469,7 +1469,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1521,7 +1521,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1613,7 +1613,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1657,7 +1657,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1713,7 +1713,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1752,7 +1752,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1808,7 +1808,7 @@
"umov w2, v4.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1855,7 +1855,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1911,7 +1911,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -1950,7 +1950,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2006,7 +2006,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2045,7 +2045,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2101,7 +2101,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1560]",
"ldr x5, [x28, #1504]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2298,7 +2298,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1560]",
"ldr x5, [x28, #1504]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2467,7 +2467,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1560]",
"ldr x5, [x28, #1504]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2636,7 +2636,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1560]",
"ldr x5, [x28, #1504]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2717,7 +2717,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2773,7 +2773,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2812,7 +2812,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2856,7 +2856,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2895,7 +2895,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2945,7 +2945,7 @@
"ldrh w0, [x28, #1296]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1608]",
"ldr x3, [x28, #1552]",
"blr x3",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -2984,7 +2984,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1560]",
"ldr x5, [x28, #1504]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3332,7 +3332,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3383,7 +3383,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3422,7 +3422,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3490,7 +3490,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3566,7 +3566,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3617,7 +3617,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3656,7 +3656,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3736,7 +3736,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3792,7 +3792,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3848,7 +3848,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3928,7 +3928,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -3968,7 +3968,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4036,7 +4036,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4075,7 +4075,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4119,7 +4119,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1688]",
"ldr x5, [x28, #1632]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4341,7 +4341,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4470,7 +4470,7 @@
"add w22, w20, w22",
"str w20, [x8, #-4]!",
"strb w21, [x28, #1298]",
"ldr x0, [x28, #2336]",
"ldr x0, [x28, #2280]",
"and x3, x22, #0xfffff",
"add x0, x0, x3, lsl #4",
"ldp x1, x0, [x0]"
@ -4615,7 +4615,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4737,7 +4737,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4817,7 +4817,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4951,7 +4951,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -4991,7 +4991,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5054,7 +5054,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5188,7 +5188,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5227,7 +5227,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5290,7 +5290,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5424,7 +5424,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5463,7 +5463,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5531,7 +5531,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5668,7 +5668,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1560]",
"ldr x5, [x28, #1504]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5725,7 +5725,7 @@
"add w22, w20, w22",
"str w20, [x8, #-4]!",
"strb w21, [x28, #1298]",
"ldr x0, [x28, #2336]",
"ldr x0, [x28, #2280]",
"and x3, x22, #0xfffff",
"add x0, x0, x3, lsl #4",
"ldp x1, x0, [x0]"
@ -5871,7 +5871,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -5973,7 +5973,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6012,7 +6012,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6116,7 +6116,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6215,7 +6215,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6254,7 +6254,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6358,7 +6358,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6457,7 +6457,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6496,7 +6496,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6576,7 +6576,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6651,7 +6651,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6690,7 +6690,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6770,7 +6770,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6809,7 +6809,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -6875,7 +6875,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1560]",
"ldr x5, [x28, #1504]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7111,7 +7111,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7186,7 +7186,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7225,7 +7225,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7293,7 +7293,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7369,7 +7369,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7444,7 +7444,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7483,7 +7483,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7551,7 +7551,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7590,7 +7590,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7658,7 +7658,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7733,7 +7733,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7772,7 +7772,7 @@
"umov w2, v2.h[4]",
"mov x3, v3.d[0]",
"umov w4, v3.h[4]",
"ldr x5, [x28, #1672]",
"ldr x5, [x28, #1616]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7852,7 +7852,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1680]",
"ldr x5, [x28, #1624]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7891,7 +7891,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1664]",
"ldr x5, [x28, #1608]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -7935,7 +7935,7 @@
"umov w2, v3.h[4]",
"mov x3, v2.d[0]",
"umov w4, v2.h[4]",
"ldr x5, [x28, #1688]",
"ldr x5, [x28, #1632]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -8273,7 +8273,7 @@
"add w22, w20, w22",
"str w20, [x8, #-4]!",
"strb w21, [x28, #1298]",
"ldr x0, [x28, #2336]",
"ldr x0, [x28, #2280]",
"and x3, x22, #0xfffff",
"add x0, x0, x3, lsl #4",
"ldp x1, x0, [x0]"
@ -8563,7 +8563,7 @@
"add w22, w20, w22",
"str w20, [x8, #-4]!",
"strb w21, [x28, #1298]",
"ldr x0, [x28, #2336]",
"ldr x0, [x28, #2280]",
"and x3, x22, #0xfffff",
"add x0, x0, x3, lsl #4",
"ldp x1, x0, [x0]"
@ -8721,7 +8721,7 @@
"movk w21, #0x1, lsl #16",
"add w21, w20, w21",
"str w20, [x8, #-4]!",
"ldr x0, [x28, #2336]",
"ldr x0, [x28, #2280]",
"and x3, x21, #0xfffff",
"add x0, x0, x3, lsl #4",
"ldp x1, x0, [x0]"

1512
unittests/InstructionCountCI/FlagM/x87-Oblivion.json
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2204
unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
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File diff suppressed because it is too large Load Diff

572
unittests/InstructionCountCI/FlagM/x87.json
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File diff suppressed because it is too large Load Diff

28
unittests/InstructionCountCI/FlagM/x87_f64.json
View File

@ -2344,7 +2344,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1768]",
"ldr x1, [x28, #1712]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2418,7 +2418,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1776]",
"ldr x1, [x28, #1720]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2490,7 +2490,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1752]",
"ldr x1, [x28, #1696]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2571,7 +2571,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1760]",
"ldr x1, [x28, #1704]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2672,7 +2672,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1792]",
"ldr x1, [x28, #1736]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2767,7 +2767,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1784]",
"ldr x1, [x28, #1728]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2846,7 +2846,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1776]",
"ldr x1, [x28, #1720]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2932,7 +2932,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1736]",
"ldr x1, [x28, #1680]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2983,7 +2983,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1744]",
"ldr x1, [x28, #1688]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3071,7 +3071,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1800]",
"ldr x1, [x28, #1744]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3135,7 +3135,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1736]",
"ldr x1, [x28, #1680]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3201,7 +3201,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1744]",
"ldr x1, [x28, #1688]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -9611,7 +9611,7 @@
"ldrh w0, [x28, #1296]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1656]",
"ldr x3, [x28, #1600]",
"blr x3",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -9706,7 +9706,7 @@
"ldrh w0, [x28, #1296]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1648]",
"ldr x3, [x28, #1592]",
"blr x3",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",

2
unittests/InstructionCountCI/H0F38.json
View File

@ -625,7 +625,7 @@
"0x66 0x0f 0x38 0x41"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2352]",
"ldr q2, [x28, #2304]",
"zip1 v3.8h, v2.8h, v17.8h",
"zip2 v2.8h, v2.8h, v17.8h",
"umin v2.4s, v3.4s, v2.4s",

14
unittests/InstructionCountCI/H0F3A.json
View File

@ -315,7 +315,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2544]",
"ldr q2, [x28, #2496]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@ -325,7 +325,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2560]",
"ldr q2, [x28, #2512]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@ -344,7 +344,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2576]",
"ldr q2, [x28, #2528]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@ -364,7 +364,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2592]",
"ldr q2, [x28, #2544]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@ -383,7 +383,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2608]",
"ldr q2, [x28, #2560]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@ -393,7 +393,7 @@
"0x66 0x0f 0x3a 0x0c"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2624]",
"ldr q2, [x28, #2576]",
"tbx v16.16b, {v17.16b}, v2.16b"
]
},
@ -462,7 +462,7 @@
"0x66 0x0f 0x3a 0x0e"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2080]",
"ldr x0, [x28, #2024]",
"ldr q2, [x0, #3440]",
"tbx v16.16b, {v17.16b}, v2.16b"
]

8
unittests/InstructionCountCI/PrimaryGroup.json
View File

@ -2742,7 +2742,7 @@
"mov x0, x6",
"mov x1, x4",
"mov x2, x7",
"ldr x3, [x28, #2800]",
"ldr x3, [x28, #2752]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",
@ -2753,7 +2753,7 @@
"mov x0, x6",
"mov x1, x4",
"mov x2, x7",
"ldr x3, [x28, #2816]",
"ldr x3, [x28, #2768]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",
@ -2814,7 +2814,7 @@
"mov x0, x6",
"mov x1, x4",
"mov x2, x7",
"ldr x3, [x28, #2808]",
"ldr x3, [x28, #2760]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",
@ -2827,7 +2827,7 @@
"mov x0, x6",
"mov x1, x4",
"mov x2, x7",
"ldr x3, [x28, #2824]",
"ldr x3, [x28, #2776]",
"str x30, [sp, #-16]!",
"blr x3",
"ldr x30, [sp], #16",

8
unittests/InstructionCountCI/SSE42_Strings.json
View File

@ -59,7 +59,7 @@
"mov x4, v17.d[0]",
"mov x5, v17.d[1]",
"mov w6, #0x0",
"ldr x7, [x28, #1808]",
"ldr x7, [x28, #1752]",
"blr x7",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -102,7 +102,7 @@
"mov x4, v17.d[0]",
"mov x5, v17.d[1]",
"mov w6, #0x0",
"ldr x7, [x28, #1808]",
"ldr x7, [x28, #1752]",
"blr x7",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -150,7 +150,7 @@
"mov x2, v17.d[0]",
"mov x3, v17.d[1]",
"mov w4, #0x0",
"ldr x5, [x28, #1816]",
"ldr x5, [x28, #1760]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -191,7 +191,7 @@
"mov x2, v17.d[0]",
"mov x3, v17.d[1]",
"mov w4, #0x0",
"ldr x5, [x28, #1816]",
"ldr x5, [x28, #1760]",
"blr x5",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",

16
unittests/InstructionCountCI/Secondary.json
View File

@ -646,7 +646,7 @@
"Comment": "0x0f 0x50",
"ExpectedArm64ASM": [
"ushr v2.4s, v16.4s, #31",
"ldr q3, [x28, #2512]",
"ldr q3, [x28, #2464]",
"ushl v2.4s, v2.4s, v3.4s",
"addv s2, v2.4s",
"mov w4, v2.s[0]"
@ -657,7 +657,7 @@
"Comment": "0x0f 0x50",
"ExpectedArm64ASM": [
"ushr v2.4s, v16.4s, #31",
"ldr q3, [x28, #2512]",
"ldr q3, [x28, #2464]",
"ushl v2.4s, v2.4s, v3.4s",
"addv s2, v2.4s",
"mov w4, v2.s[0]"
@ -1048,7 +1048,7 @@
"Comment": "0x0f 0x70",
"ExpectedArm64ASM": [
"ldr d2, [x28, #1056]",
"ldr x0, [x28, #2032]",
"ldr x0, [x28, #1976]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"str d2, [x28, #1040]"
@ -1059,7 +1059,7 @@
"Comment": "0x0f 0x70",
"ExpectedArm64ASM": [
"ldr d2, [x4]",
"ldr x0, [x28, #2032]",
"ldr x0, [x28, #1976]",
"ldr d3, [x0, #16]",
"tbl v2.8b, {v2.16b}, v3.8b",
"str d2, [x28, #1040]"
@ -3283,7 +3283,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v16.16b, v17.16b}, v2.16b"
]
@ -3292,7 +3292,7 @@
"ExpectedInstructionCount": 5,
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #16]",
"mov v0.16b, v17.16b",
"mov v1.16b, v16.16b",
@ -3304,7 +3304,7 @@
"Comment": "0x0f 0xc6",
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q3, [x0, #16]",
"mov v0.16b, v16.16b",
"mov v1.16b, v2.16b",
@ -3402,7 +3402,7 @@
"Comment": "0x0f 0xd7",
"ExpectedArm64ASM": [
"ldr d2, [x28, #1040]",
"ldr d3, [x28, #2640]",
"ldr d3, [x28, #2592]",
"cmlt v2.16b, v2.16b, #0",
"and v2.16b, v2.16b, v3.16b",
"addp v2.16b, v2.16b, v2.16b",

8
unittests/InstructionCountCI/Secondary_OpSize.json
View File

@ -523,7 +523,7 @@
"0x66 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2048]",
"ldr x0, [x28, #1992]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@ -537,7 +537,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x4]",
"ldr x0, [x28, #2048]",
"ldr x0, [x28, #1992]",
"ldr q3, [x0, #16]",
"tbl v16.16b, {v2.16b}, v3.16b"
]
@ -1015,7 +1015,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0x66 0x0f 0xd0",
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v17.16b, v2.16b",
"fadd v16.2d, v16.2d, v2.2d"
]
@ -1071,7 +1071,7 @@
"ExpectedInstructionCount": 7,
"Comment": "0x66 0x0f 0xd7",
"ExpectedArm64ASM": [
"ldr q2, [x28, #2640]",
"ldr q2, [x28, #2592]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",

4
unittests/InstructionCountCI/Secondary_REP.json
View File

@ -342,7 +342,7 @@
"0xf3 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2040]",
"ldr x0, [x28, #1984]",
"ldr q2, [x0, #1280]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@ -355,7 +355,7 @@
"0xf3 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2040]",
"ldr x0, [x28, #1984]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]

6
unittests/InstructionCountCI/Secondary_REPNE.json
View File

@ -284,7 +284,7 @@
"0xf2 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2032]",
"ldr x0, [x28, #1976]",
"ldr q2, [x0, #1280]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@ -297,7 +297,7 @@
"0xf2 0x0f 0x70"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2032]",
"ldr x0, [x28, #1976]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b}, v2.16b"
]
@ -453,7 +453,7 @@
"ExpectedInstructionCount": 3,
"Comment": "0xf2 0x0f 0xd0",
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v17.16b, v2.16b",
"fadd v16.4s, v16.4s, v2.4s"
]

18
unittests/InstructionCountCI/VEX_map1.json
View File

@ -2801,7 +2801,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #16]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@ -2870,7 +2870,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #32]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@ -2939,7 +2939,7 @@
"Map 1 0b00 0xC6 128-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #2056]",
"ldr x0, [x28, #2000]",
"ldr q2, [x0, #48]",
"tbl v16.16b, {v17.16b, v18.16b}, v2.16b"
]
@ -4384,7 +4384,7 @@
"Map 1 0b01 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.2d, v17.2d, v2.2d"
]
@ -4395,7 +4395,7 @@
"Map 1 0b01 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1856]",
"ldr x0, [x28, #1800]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.d, z17.d, z2.d"
@ -4407,7 +4407,7 @@
"Map 1 0b11 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.4s, v17.4s, v2.4s"
]
@ -4418,7 +4418,7 @@
"Map 1 0b11 0xd0 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1840]",
"ldr x0, [x28, #1784]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"fadd z16.s, z17.s, z2.s"
@ -4544,7 +4544,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2640]",
"ldr q2, [x28, #2592]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
@ -4559,7 +4559,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1968]",
"ldr x0, [x28, #1912]",
"ld1b {z2.b}, p7/z, [x0]",
"mrs x0, nzcv",
"mov z0.d, #0",

50
unittests/InstructionCountCI/VEX_map2.json
View File

@ -1603,7 +1603,7 @@
"Map 2 0b01 0x41 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2352]",
"ldr q2, [x28, #2304]",
"zip1 v3.8h, v2.8h, v17.8h",
"zip2 v2.8h, v2.8h, v17.8h",
"umin v2.4s, v3.4s, v2.4s",
@ -3657,7 +3657,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.4s, v16.4s, v18.4s",
"mov v16.16b, v2.16b"
@ -3669,7 +3669,7 @@
"Map 2 0b01 0x96 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1840]",
"ldr x0, [x28, #1784]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@ -3683,7 +3683,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.2d, v16.2d, v18.2d",
"mov v16.16b, v2.16b"
@ -3695,7 +3695,7 @@
"Map 2 0b01 0x96 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1856]",
"ldr x0, [x28, #1800]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@ -3709,7 +3709,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.4s, v16.4s, v18.4s",
"mov v16.16b, v2.16b"
@ -3721,7 +3721,7 @@
"Map 2 0b01 0x97 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1872]",
"ldr x0, [x28, #1816]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@ -3735,7 +3735,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v17.16b, v2.16b",
"fmla v2.2d, v16.2d, v18.2d",
"mov v16.16b, v2.16b"
@ -3747,7 +3747,7 @@
"Map 2 0b01 0x97 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1888]",
"ldr x0, [x28, #1832]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z17.d, z2.d",
"mov z0.d, z2.d",
@ -4609,7 +4609,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.4s, v17.4s, v16.4s",
"mov v16.16b, v2.16b"
@ -4621,7 +4621,7 @@
"Map 2 0b01 0xa6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1840]",
"ldr x0, [x28, #1784]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@ -4635,7 +4635,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.2d, v17.2d, v16.2d",
"mov v16.16b, v2.16b"
@ -4647,7 +4647,7 @@
"Map 2 0b01 0xa6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1856]",
"ldr x0, [x28, #1800]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@ -4661,7 +4661,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.4s, v17.4s, v16.4s",
"mov v16.16b, v2.16b"
@ -4673,7 +4673,7 @@
"Map 2 0b01 0xa7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1872]",
"ldr x0, [x28, #1816]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@ -4687,7 +4687,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v18.16b, v2.16b",
"fmla v2.2d, v17.2d, v16.2d",
"mov v16.16b, v2.16b"
@ -4699,7 +4699,7 @@
"Map 2 0b01 0xa7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1888]",
"ldr x0, [x28, #1832]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z18.d, z2.d",
"mov z0.d, z2.d",
@ -4713,7 +4713,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2384]",
"ldr q2, [x28, #2336]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.4s, v17.4s, v18.4s",
"mov v16.16b, v2.16b"
@ -4725,7 +4725,7 @@
"Map 2 0b01 0xb6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1840]",
"ldr x0, [x28, #1784]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@ -4738,7 +4738,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2416]",
"ldr q2, [x28, #2368]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.2d, v17.2d, v18.2d",
"mov v16.16b, v2.16b"
@ -4750,7 +4750,7 @@
"Map 2 0b01 0xb6 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1856]",
"ldr x0, [x28, #1800]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@ -4763,7 +4763,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2448]",
"ldr q2, [x28, #2400]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.4s, v17.4s, v18.4s",
"mov v16.16b, v2.16b"
@ -4775,7 +4775,7 @@
"Map 2 0b01 0xb7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1872]",
"ldr x0, [x28, #1816]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",
@ -4788,7 +4788,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2480]",
"ldr q2, [x28, #2432]",
"eor v2.16b, v16.16b, v2.16b",
"fmla v2.2d, v17.2d, v18.2d",
"mov v16.16b, v2.16b"
@ -4800,7 +4800,7 @@
"Map 2 0b01 0xb7 256-bit"
],
"ExpectedArm64ASM": [
"ldr x0, [x28, #1888]",
"ldr x0, [x28, #1832]",
"ld1b {z2.b}, p7/z, [x0]",
"eor z2.d, z16.d, z2.d",
"mov z16.d, z2.d",

4
unittests/InstructionCountCI/VEX_map3.json
View File

@ -4862,7 +4862,7 @@
"Map 3 0b01 0xdf 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2528]",
"ldr q2, [x28, #2480]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"unimplemented (Unimplemented)",
@ -4875,7 +4875,7 @@
"Map 3 0b01 0xdf 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2528]",
"ldr q2, [x28, #2480]",
"movi v3.2d, #0x0",
"mov v16.16b, v17.16b",
"unimplemented (Unimplemented)",

572
unittests/InstructionCountCI/x87.json
View File

File diff suppressed because it is too large Load Diff

28
unittests/InstructionCountCI/x87_f64.json
View File

@ -2362,7 +2362,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1768]",
"ldr x1, [x28, #1712]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2436,7 +2436,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1776]",
"ldr x1, [x28, #1720]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2508,7 +2508,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1752]",
"ldr x1, [x28, #1696]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2589,7 +2589,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1760]",
"ldr x1, [x28, #1704]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2690,7 +2690,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1792]",
"ldr x1, [x28, #1736]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2785,7 +2785,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1784]",
"ldr x1, [x28, #1728]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2864,7 +2864,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1776]",
"ldr x1, [x28, #1720]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -2950,7 +2950,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1736]",
"ldr x1, [x28, #1680]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3001,7 +3001,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1744]",
"ldr x1, [x28, #1688]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3089,7 +3089,7 @@
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64",
"str x30, [x0]",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1800]",
"ldr x1, [x28, #1744]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3153,7 +3153,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1736]",
"ldr x1, [x28, #1680]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -3219,7 +3219,7 @@
"str x30, [x0]",
"mov v0.8b, v2.8b",
"ldrh w0, [x28, #1296]",
"ldr x1, [x28, #1744]",
"ldr x1, [x28, #1688]",
"blr x1",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
@ -9749,7 +9749,7 @@
"ldrh w0, [x28, #1296]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1656]",
"ldr x3, [x28, #1600]",
"blr x3",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",
@ -9844,7 +9844,7 @@
"ldrh w0, [x28, #1296]",
"mov x1, v2.d[0]",
"umov w2, v2.h[4]",
"ldr x3, [x28, #1648]",
"ldr x3, [x28, #1592]",
"blr x3",
"ldr w4, [x28, #1000]",
"msr nzcv, x4",