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Merge pull request #3646 from alyssarosenzweig/opt/minor-disp

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OpcodeDispatcher: eliminate some Bfe's
This commit is contained in:
Ryan Houdek 2024-05-21 15:57:52 -07:00 committed by GitHub
commit 7b4e48480b
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GPG Key ID: B5690EEEBB952194
2 changed files with 9 additions and 18 deletions
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15
FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
View File

@ -168,17 +168,12 @@ void OpDispatchBuilder::LEAOp(OpcodeArgs) {
X86Tables::DecodeFlags::GetOpAddr(Op->Flags, 0) == X86Tables::DecodeFlags::FLAG_WIDENING_SIZE_LAST ? 8 :
4;
auto Src = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], SrcSize, Op->Flags, {.LoadData = false});
if (DstSize != SrcSize) {
// If the SrcSize isn't the DstSize then we need to zero extend.
const uint8_t GPRSize = CTX->GetGPRSize();
Src = _Bfe(IR::SizeToOpSize(GPRSize), SrcSize * 8, 0, Src);
}
auto Src = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], SrcSize, Op->Flags, {.LoadData = false, .AllowUpperGarbage = SrcSize > DstSize});
StoreResult_WithOpSize(GPRClass, Op, Op->Dest, Src, DstSize, -1);
} else {
uint32_t DstSize = X86Tables::DecodeFlags::GetOpAddr(Op->Flags, 0) == X86Tables::DecodeFlags::FLAG_OPERAND_SIZE_LAST ? 2 : 4;
auto Src = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], SrcSize, Op->Flags, {.LoadData = false});
auto Src = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], SrcSize, Op->Flags, {.LoadData = false, .AllowUpperGarbage = SrcSize > DstSize});
StoreResult_WithOpSize(GPRClass, Op, Op->Dest, Src, DstSize, -1);
}
}
@ -3876,17 +3871,17 @@ void OpDispatchBuilder::CMPXCHGOp(OpcodeArgs) {
OrderedNode* Src3Lower {};
if (GPRSize == 8 && Size == 4) {
Src1 = LoadSource_WithOpSize(GPRClass, Op, Op->Dest, GPRSize, Op->Flags);
Src1Lower = _Bfe(IR::SizeToOpSize(GPRSize), Size * 8, 0, Src1);
Src3 = LoadGPRRegister(X86State::REG_RAX);
} else {
Src1 = LoadSource_WithOpSize(GPRClass, Op, Op->Dest, Size, Op->Flags);
Src1Lower = Src1;
Src3 = LoadGPRRegister(X86State::REG_RAX);
}
if (Size != GPRSize) {
Src1Lower = _Bfe(IR::SizeToOpSize(GPRSize), Size * 8, 0, Src1);
Src3Lower = _Bfe(IR::SizeToOpSize(GPRSize), Size * 8, 0, Src3);
} else {
Src1Lower = Src1;
Src3Lower = Src3;
}
@ -4379,7 +4374,7 @@ OrderedNode* OpDispatchBuilder::LoadSource_WithOpSize(RegisterClassType Class, c
LOGMAN_MSG_A_FMT("Unknown Src Type: {}\n", Operand.Type);
}
if (LoadableType && AddrSize < GPRSize) {
if (LoadableType && AddrSize < GPRSize && (LoadData || !AllowUpperGarbage)) {
// For 64-bit AddrSize can be 32-bit or 64-bit
// For 32-bit AddrSize can be 32-bit or 16-bit
//

12
unittests/InstructionCountCI/Primary.json
View File

@ -2183,11 +2183,10 @@
]
},
"lea eax, [rbx+rcx*1 + 0]": {
"ExpectedInstructionCount": 3,
"ExpectedInstructionCount": 2,
"Comment": "0x8d",
"ExpectedArm64ASM": [
"add x20, x7, x5",
"mov x20, x20",
"mov w4, w20"
]
},
@ -2207,11 +2206,10 @@
]
},
"lea eax, [rbx+rcx*2 + 0]": {
"ExpectedInstructionCount": 3,
"ExpectedInstructionCount": 2,
"Comment": "0x8d",
"ExpectedArm64ASM": [
"add x20, x7, x5, lsl #1",
"mov x20, x20",
"mov w4, w20"
]
},
@ -2231,11 +2229,10 @@
]
},
"lea eax, [rbx+rcx*4 + 0]": {
"ExpectedInstructionCount": 3,
"ExpectedInstructionCount": 2,
"Comment": "0x8d",
"ExpectedArm64ASM": [
"add x20, x7, x5, lsl #2",
"mov x20, x20",
"mov w4, w20"
]
},
@ -2255,11 +2252,10 @@
]
},
"lea eax, [rbx+rcx*8 + 0]": {
"ExpectedInstructionCount": 3,
"ExpectedInstructionCount": 2,
"Comment": "0x8d",
"ExpectedArm64ASM": [
"add x20, x7, x5, lsl #3",
"mov x20, x20",
"mov w4, w20"
]
},