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OpcodeDispatcher: Handle VPACKUSDW

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This commit is contained in:
lioncash 2022-12-17 03:33:30 +00:00
parent bb6a0f39f5
commit 873d63002a
4 changed files with 57 additions and 1 deletions
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1
External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp vendored
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@ -5987,6 +5987,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(2, 0b01, 0x29), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VCMPEQ, 8>},
{OPD(2, 0b01, 0x2A), 1, &OpDispatchBuilder::VMOVVectorNTOp},
{OPD(2, 0b01, 0x2B), 1, &OpDispatchBuilder::VPACKUSOp<4>},
{OPD(2, 0b01, 0x30), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 2, false>},
{OPD(2, 0b01, 0x31), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 4, false>},

2
External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp vendored
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@ -2132,6 +2132,8 @@ void OpDispatchBuilder::VPACKUSOp(OpcodeArgs) {
template
void OpDispatchBuilder::VPACKUSOp<2>(OpcodeArgs);
template
void OpDispatchBuilder::VPACKUSOp<4>(OpcodeArgs);
OrderedNode* OpDispatchBuilder::PACKSSOpImpl(OpcodeArgs, size_t ElementSize,
OrderedNode *Src1, OrderedNode *Src2) {

2
External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp vendored
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@ -299,7 +299,7 @@ void InitializeVEXTables() {
{OPD(2, 0b01, 0x28), 1, X86InstInfo{"VPMULDQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x29), 1, X86InstInfo{"VPCMPEQQ", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x2A), 1, X86InstInfo{"VMOVNTDQA", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_SF_MOD_MEM_ONLY | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x2B), 1, X86InstInfo{"VPACKUSDW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x2B), 1, X86InstInfo{"VPACKUSDW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x2C), 1, X86InstInfo{"VMASKMOVPS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x2D), 1, X86InstInfo{"VMASKMOVPD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x2E), 1, X86InstInfo{"VMASKMOVPS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},

53
unittests/ASM/VEX/vpackusdw.asm Normal file
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@ -0,0 +1,53 @@
%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM3": ["0xFFFFFFFFFFFFFFFF", "0x00000000FFFF0000", "0x0000000000000000", "0x0000000000000000"],
"XMM4": ["0xFFFFFFFFFFFFFFFF", "0x12348000FFFF0000", "0x0000000000000000", "0x0000000000000000"],
"XMM5": ["0xFFFFFFFFFFFFFFFF", "0x00000000FFFF0000", "0xFFFFFFFFFFFFFFFF", "0x00000000FFFF0000"],
"XMM6": ["0xFFFFFFFFFFFFFFFF", "0x12348000FFFF0000", "0xFFFFFFFFFFFFFFFF", "0x12348000FFFF0000"],
"XMM7": ["0xFFFFFFFFFFFFFFFF", "0x00000000FFFF0000", "0x0000000000000000", "0x0000000000000000"],
"XMM8": ["0xFFFFFFFFFFFFFFFF", "0x12348000FFFF0000", "0x0000000000000000", "0x0000000000000000"],
"XMM9": ["0xFFFFFFFFFFFFFFFF", "0x00000000FFFF0000", "0xFFFFFFFFFFFFFFFF", "0x00000000FFFF0000"],
"XMM10": ["0xFFFFFFFFFFFFFFFF", "0x12348000FFFF0000", "0xFFFFFFFFFFFFFFFF", "0x12348000FFFF0000"]
}
}
%endif
lea rdx, [rel .data]
vmovapd ymm0, [rdx]
vmovapd ymm1, [rdx + 32 * 1]
vmovapd ymm2, [rdx + 32 * 2]
vpackusdw xmm3, xmm0, [rdx + 32 * 1]
vpackusdw xmm4, xmm0, [rdx + 32 * 2]
vpackusdw ymm5, ymm0, [rdx + 32 * 1]
vpackusdw ymm6, ymm0, [rdx + 32 * 2]
vpackusdw xmm7, xmm0, xmm1
vpackusdw xmm8, xmm0, xmm2
vpackusdw ymm9, ymm0, ymm1
vpackusdw ymm10, ymm0, ymm2
hlt
align 32
.data:
dq 0x4142434445464748
dq 0x5152535455565758
dq 0x4142434445464748
dq 0x5152535455565758
dq 0x7FFFFFFF00000000
dq 0xFFFFFFFF80000000
dq 0x7FFFFFFF00000000
dq 0xFFFFFFFF80000000
; Values that actually fit in to 16bit unsigned
dq 0x0000FFFF00000000
dq 0x0000123400008000
dq 0x0000FFFF00000000
dq 0x0000123400008000