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Merge pull request #3811 from alyssarosenzweig/ra/fix-lsp

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RA: fix interaction between SRA & shuffles
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Ryan Houdek 2024-07-04 14:20:46 -07:00 committed by GitHub
commit 90a6647fa4
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2 changed files with 54 additions and 1 deletions
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7
FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp
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@ -461,7 +461,12 @@ private:
// If that scalar is free because it is killed by this instruction, it
// needs to be shuffled too, since the copy would clobber it.
for (auto s = 0; s < IR::GetRAArgs(Pivot->Op); ++s) {
const PhysicalRegister ClobberReg = SSAToReg[Pivot->Args[s].ID().Value];
// It is possible that the argument is to be remapped, but the actual
// remapping in the IR only happens later in the pass so we need to
// Map() explicitly. This can be hit with SRA shuffles.
Ref New = Map(IR->GetNode(Pivot->Args[s]));
const PhysicalRegister ClobberReg = SSAToReg[IR->GetID(New).Value];
if (ClobberReg.Class == GPRClass && ClobberReg.Reg == NewReg) {
Clobber = IR->GetNode(Pivot->Args[s]);
break;

48
unittests/ASM/FEX_bugs/TrickyRA.asm Normal file
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@ -0,0 +1,48 @@
%ifdef CONFIG
{
"RegData": {
}
}
%endif
; This test is reduced from a game that hit a register allocation bug. The test
; has a high register pressure across a `rep movsb` (_Memcpy), and since _Memcpy
; is modelled as writing a GPRPair, this induces live range splitting at the
; time of writing. FEX had a bug where live range splitting was unsound in
; certain circumstances.
mov rsp, 0xe000_1000
lea rbp, [rel .data_mid]
lea rdi, [rel .data_dst]
lea rsi, [rel .data_src]
mov rcx, 11
; Store where it is expected
mov [rbp-0x9e8], rcx
mov rcx, rdi
jmp .test
.test:
mov rax, qword [rbp-0x9f0]
mov rdx, qword [rbp-0x9e8]
mov rdi, rcx
mov rcx, rdx
popfq
rep movsb ; Uses RDI and RSI
pushfq
mov qword [rbp-0x9f0], rax
mov qword [rbp-0x9e8], rdx
hlt
align 16
.data:
times 4096 db 0
.data_mid:
times 4096 db 0
.data_dst:
times 16 db 0
.data_src:
times 16 db 0