FEX-Emu/FEX
1
0
Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2025-01-23 23:17:44 +00:00
Code Issues Actions 6 Packages Projects Releases Wiki Activity

OpcodeDispatcher: Handle VANDNPD

Browse Source
This commit is contained in:
lioncash 2022-11-30 15:44:25 +00:00
parent 120a6b85f4
commit a483bc9837
3 changed files with 47 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp vendored
View File

@ -5831,6 +5831,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(1, 0b01, 0x54), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VAND, 16>},
{OPD(1, 0b00, 0x55), 1, &OpDispatchBuilder::VANDNOp},
{OPD(1, 0b01, 0x55), 1, &OpDispatchBuilder::VANDNOp},
{OPD(1, 0b00, 0x56), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VOR, 16>},
{OPD(1, 0b01, 0x56), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VOR, 16>},

2
External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp vendored
View File

@ -66,7 +66,7 @@ void InitializeVEXTables() {
{OPD(1, 0b01, 0x54), 1, X86InstInfo{"VANDPD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b00, 0x55), 1, X86InstInfo{"VANDNPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b01, 0x55), 1, X86InstInfo{"VANDNPD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(1, 0b01, 0x55), 1, X86InstInfo{"VANDNPD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b00, 0x56), 1, X86InstInfo{"VORPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(1, 0b01, 0x56), 1, X86InstInfo{"VORPD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},

45
unittests/ASM/VEX/vandnpd.asm Normal file
View File

@ -0,0 +1,45 @@
%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM0": ["0x4142434445464748", "0x5152535455565758", "0x6162636465666768", "0x7172737475767778"],
"XMM1": ["0xCCCCCCCC75767778", "0x61626364DDDDDDDD", "0xEEEEEEEE55565758", "0x41424344FFFFFFFF"],
"XMM2": ["0x8C8C8C8830303030", "0x2020202088898885", "0x8E8C8C8A10101010", "0x000000008A898887"],
"XMM3": ["0x8C8C8C8830303030", "0x2020202088898885", "0x0000000000000000", "0x0000000000000000"],
"XMM4": ["0x8C8C8C8830303030", "0x2020202088898885", "0x8E8C8C8A10101010", "0x000000008A898887"],
"XMM5": ["0x8C8C8C8830303030", "0x2020202088898885", "0x0000000000000000", "0x0000000000000000"]
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
lea rdx, [rel .data1]
lea rbx, [rel .data2]
vmovapd ymm0, [rdx]
vmovapd ymm1, [rbx]
; Register only
vandnpd ymm2, ymm0, ymm1
vandnpd xmm3, xmm0, xmm1
; With memory operand
vandnpd ymm4, ymm0, [rbx]
vandnpd xmm5, xmm0, [rbx]
hlt
align 32
.data1:
dq 0x4142434445464748
dq 0x5152535455565758
dq 0x6162636465666768
dq 0x7172737475767778
.data2:
dq 0xCCCCCCCC75767778
dq 0x61626364DDDDDDDD
dq 0xEEEEEEEE55565758
dq 0x41424344FFFFFFFF