Implement unit tests for the group 1 primary group table

This commit is contained in:
Ryan Houdek 2020-03-06 22:11:36 -08:00
parent d84b536c4a
commit a80abb6ed3
24 changed files with 887 additions and 0 deletions

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x414243444546A848"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
add byte [rdx + 8 * 0 + 1], 0x61
mov rax, [rdx + 8 * 0]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445466748"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
or byte [rdx + 8 * 0 + 1], 0x61
mov rax, [rdx + 8 * 0]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445A8A848"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
clc
adc byte [rdx + 8 * 0 + 1], 0x61
stc
adc byte [rdx + 8 * 0 + 2], 0x61
mov rax, [rdx + 8 * 0]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445E4E648"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
clc
sbb byte [rdx + 8 * 0 + 1], 0x61
stc
sbb byte [rdx + 8 * 0 + 2], 0x61
mov rax, [rdx + 8 * 0]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445464148"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
and byte [rdx + 8 * 0 + 1], 0x61
mov rax, [rdx + 8 * 0]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x414243444546E648"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
sub byte [rdx + 8 * 0 + 1], 0x61
mov rax, [rdx + 8 * 0]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445462648"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
xor byte [rdx + 8 * 0 + 1], 0x61
mov rax, [rdx + 8 * 0]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445468348"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
cmp byte [rdx + 8 * 0 + 1], 0x61
; cmp = 0x47 - 0x61 = 0xE6
; 0: CF - 00000001
; 1: - 00000010
; 2: PF - 00000000
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 10000000
; ================
; 10000011
; OF: LAHF doesn't load - 0
mov rax, [rdx + 8 * 0]
lahf
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x41424344A6A84748",
"RBX": "0x51525354B6B8BABC",
"RCX": "0x61626364C6C8CACC",
"RDX": "0x6162636465666668"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
add word [rdx + 8 * 0 + 2], 0x6162
add dword [rdx + 8 * 1 + 0], 0x61626364
add qword [rdx + 8 * 2 + 0], 0x61626364
add qword [rdx + 8 * 3 + 0], -256
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
mov rdx, [rdx + 8 * 3]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434465664748",
"RBX": "0x515253547576777C",
"RCX": "0x616263646566676C",
"RDX": "0xFFFFFFFFFFFFFF68"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
or word [rdx + 8 * 0 + 2], 0x6162
or dword [rdx + 8 * 1 + 0], 0x61626364
or qword [rdx + 8 * 2 + 0], 0x61626364
or qword [rdx + 8 * 3 + 0], -256
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
mov rdx, [rdx + 8 * 3]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142A4A7A6A84748",
"RBX": "0x51525354181B1E21",
"RCX": "0x61626365282B2E31",
"RDX": "0x6162636465666569"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
clc
adc word [rdx + 8 * 0 + 2], 0x6162
clc
adc dword [rdx + 8 * 1 + 0], 0x61626364
clc
adc qword [rdx + 8 * 2 + 0], 0x61626364
clc
adc qword [rdx + 8 * 3 + 0], -256
stc
adc word [rdx + 8 * 0 + 4], 0x6162
stc
adc dword [rdx + 8 * 1 + 0], 0x61626364
stc
adc qword [rdx + 8 * 2 + 0], 0x61626364
stc
adc qword [rdx + 8 * 3 + 0], -256
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
mov rdx, [rdx + 8 * 3]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142E1E1E3E44748",
"RBX": "0x515253549291908F",
"RCX": "0x61626363A2A1A09F",
"RDX": "0x6162636465666967"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
clc
sbb word [rdx + 8 * 0 + 2], 0x6162
clc
sbb dword [rdx + 8 * 1 + 0], 0x61626364
clc
sbb qword [rdx + 8 * 2 + 0], 0x61626364
clc
sbb qword [rdx + 8 * 3 + 0], -256
stc
sbb word [rdx + 8 * 0 + 4], 0x6162
stc
sbb dword [rdx + 8 * 1 + 0], 0x61626364
stc
sbb qword [rdx + 8 * 2 + 0], 0x61626364
stc
sbb qword [rdx + 8 * 3 + 0], -256
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
mov rdx, [rdx + 8 * 3]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434441424748",
"RBX": "0x5152535441424340",
"RCX": "0x0000000061626360",
"RDX": "0x6162636465666700"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
and word [rdx + 8 * 0 + 2], 0x6162
and dword [rdx + 8 * 1 + 0], 0x61626364
and qword [rdx + 8 * 2 + 0], 0x61626364
and qword [rdx + 8 * 3 + 0], -256
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
mov rdx, [rdx + 8 * 3]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x41424344E3E44748",
"RBX": "0x51525354F3F3F3F4",
"RCX": "0x6162636404040404",
"RDX": "0x6162636465666868"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
sub word [rdx + 8 * 0 + 2], 0x6162
sub dword [rdx + 8 * 1 + 0], 0x61626364
sub qword [rdx + 8 * 2 + 0], 0x61626364
sub qword [rdx + 8 * 3 + 0], -256
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
mov rdx, [rdx + 8 * 3]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434424244748",
"RBX": "0x515253543434343C",
"RCX": "0x616263640404040C",
"RDX": "0x9E9D9C9B9A999868"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
xor word [rdx + 8 * 0 + 2], 0x6162
xor dword [rdx + 8 * 1 + 0], 0x61626364
xor qword [rdx + 8 * 2 + 0], 0x61626364
xor qword [rdx + 8 * 3 + 0], -256
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
mov rdx, [rdx + 8 * 3]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x8700",
"RBX": "0x8300",
"RCX": "0x0200",
"RSI": "0x0300"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 3], rax
cmp qword [rdx + 8 * 3 + 0], -256
; cmp = 0x6162636465666768 - -256(0xFFFFFFFFFFFF00) = 0x6162636465666512
; 0: CF - 00000001
; 1: - 00000010
; 2: PF - 00000000
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 00000000
; ================
; 00000011
; OF: LAHF doesn't load - 0
mov rax, 0
lahf
mov rsi, rax
cmp qword [rdx + 8 * 2 + 0], 0x61626364
; cmp = 0x6162636465666768- 0x61626364 = 0x6162636404040404
; 0: CF - 00000000
; 1: - 00000010
; 2: PF - 00000000
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 00000000
; ================
; 00000010
; OF: LAHF doesn't load - 0
mov rax, 0
lahf
mov rcx, rax
cmp dword [rdx + 8 * 1 + 0], 0x61626364
; cmp = 0x55565758 - 0x61626364 = 0xF3F3F3F4
; 0: CF - 00000001
; 1: - 00000010
; 2: PF - 00000000
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 10000000
; ================
; 10000011
; OF: LAHF doesn't load - 0
mov rax, 0
lahf
mov rbx, rax
cmp word [rdx + 8 * 0 + 2], 0x6162
; cmp = 0x4546 - 0x6162 = 0xE3E4
; 0: CF - 00000001
; 1: - 00000010
; 2: PF - 00000100
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 10000000
; ================
; 10000111
; OF: LAHF doesn't load - 0
mov rax, 0
lahf
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445464729",
"RBX": "0x5152535455565739",
"RCX": "0x6162636465666749"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
add word [rdx + 8 * 0 + 0], -31
add dword [rdx + 8 * 1 + 0], -31
add qword [rdx + 8 * 2 + 0], -31
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x414243444546FFE9",
"RBX": "0x51525354FFFFFFF9",
"RCX": "0xFFFFFFFFFFFFFFE9"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
or word [rdx + 8 * 0 + 0], -31
or dword [rdx + 8 * 1 + 0], -31
or qword [rdx + 8 * 2 + 0], -31
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142432645274748",
"RBX": "0x515253545556571B",
"RCX": "0x616263646566672B"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
clc
adc word [rdx + 8 * 0 + 2], -31
clc
adc dword [rdx + 8 * 1 + 0], -31
clc
adc qword [rdx + 8 * 2 + 0], -31
stc
adc word [rdx + 8 * 0 + 4], -31
stc
adc dword [rdx + 8 * 1 + 0], -31
stc
adc qword [rdx + 8 * 2 + 0], -31
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142436245654748",
"RBX": "0x5152535455565795",
"RCX": "0x61626364656667A5"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
clc
sbb word [rdx + 8 * 0 + 2], -31
clc
sbb dword [rdx + 8 * 1 + 0], -31
clc
sbb qword [rdx + 8 * 2 + 0], -31
stc
sbb word [rdx + 8 * 0 + 4], -31
stc
sbb dword [rdx + 8 * 1 + 0], -31
stc
sbb qword [rdx + 8 * 2 + 0], -31
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445464740",
"RBX": "0x5152535455565740",
"RCX": "0x6162636465666760"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
and word [rdx + 8 * 0 + 0], -31
and dword [rdx + 8 * 1 + 0], -31
and qword [rdx + 8 * 2 + 0], -31
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x4142434445464767",
"RBX": "0x5152535455565777",
"RCX": "0x6162636465666787"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
sub word [rdx + 8 * 0 + 0], -31
sub dword [rdx + 8 * 1 + 0], -31
sub qword [rdx + 8 * 2 + 0], -31
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x414243444546B8A9",
"RBX": "0x51525354AAA9A8B9",
"RCX": "0x9E9D9C9B9A999889"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
xor word [rdx + 8 * 0 + 0], -31
xor dword [rdx + 8 * 1 + 0], -31
xor qword [rdx + 8 * 2 + 0], -31
mov rax, [rdx + 8 * 0]
mov rbx, [rdx + 8 * 1]
mov rcx, [rdx + 8 * 2]
hlt

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%ifdef CONFIG
{
"RegData": {
"RAX": "0x0700",
"RBX": "0x0700",
"RCX": "0x0700"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x4142434445464748
mov [rdx + 8 * 0], rax
mov rax, 0x5152535455565758
mov [rdx + 8 * 1], rax
mov rax, 0x6162636465666768
mov [rdx + 8 * 2], rax
cmp qword [rdx + 8 * 2 + 0], -31
; cmp = 0x6162636465666768 - -31 = 0x6162636465666787
; 0: CF - 00000001
; 1: - 00000010
; 2: PF - 00000100
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 00000000
; ================
; 00000111
; OF: LAHF doesn't load - 0
mov rax, 0
lahf
mov rcx, rax
cmp dword [rdx + 8 * 1 + 0], -31
; cmp = 0x55565758 - -31 = 0x55565777
; 0: CF - 00000001
; 1: - 00000010
; 2: PF - 00000100
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 00000000
; ================
; 00000111
; OF: LAHF doesn't load - 0
mov rax, 0
lahf
mov rbx, rax
cmp word [rdx + 8 * 0 + 2], -31
; cmp = 0x4546 - -31 = 0x4577
; 0: CF - 00000001
; 1: - 00000010
; 2: PF - 00000100
; 3: 0 - 00000000
; 4: AF - 00000000
; 5: 0 - 00000000
; 6: ZF - 00000000
; 7: SF - 00000000
; ================
; 00000111
; OF: LAHF doesn't load - 0
mov rax, 0
lahf
hlt