mirror of
https://github.com/FEX-Emu/FEX.git
synced 2025-03-06 05:27:18 +00:00
Changes over IRValidation to the new format.
We still can't pass this validation pass
This commit is contained in:
Ryan Houdek
Stefanos Kornilios Mitsis Poiitidis
parent
b7c7a34cf6
commit
b199ce70e9
@ -6,13 +6,10 @@
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namespace FEXCore::IR::Validation {
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struct BlockInfo {
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IR::OrderedNodeWrapper *Begin;
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IR::OrderedNodeWrapper *End;
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bool HasExit;
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std::vector<IR::OrderedNodeWrapper*> Predecessors;
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std::vector<IR::OrderedNodeWrapper*> Successors;
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std::vector<IR::OrderedNode const*> Predecessors;
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std::vector<IR::OrderedNode const*> Successors;
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};
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class IRValidation final : public FEXCore::IR::Pass {
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@ -25,139 +22,167 @@ private:
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bool IRValidation::Run(OpDispatchBuilder *Disp) {
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bool HadError = false;
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bool HadWarning = false;
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OffsetToBlockMap.clear();
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auto CurrentIR = Disp->ViewIR();
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uintptr_t ListBegin = CurrentIR.GetListData();
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uintptr_t DataBegin = CurrentIR.GetData();
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IR::NodeWrapperIterator Begin = CurrentIR.begin();
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IR::NodeWrapperIterator End = CurrentIR.end();
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bool InBlock = false;
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BlockInfo *CurrentBlock {};
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std::ostringstream Errors;
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std::ostringstream Warnings;
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while (Begin != End) {
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OrderedNodeWrapper *WrapperOp = Begin();
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OrderedNode *RealNode = WrapperOp->GetNode(ListBegin);
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FEXCore::IR::IROp_Header *IROp = RealNode->Op(DataBegin);
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auto Begin = CurrentIR.begin();
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auto Op = Begin();
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uint8_t OpSize = IROp->Size;
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OrderedNode *RealNode = Op->GetNode(ListBegin);
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auto HeaderOp = RealNode->Op(DataBegin)->CW<FEXCore::IR::IROp_IRHeader>();
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LogMan::Throw::A(HeaderOp->Header.Op == OP_IRHEADER, "First op wasn't IRHeader");
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if (IROp->HasDest) {
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HadError |= OpSize == 0;
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if (OpSize == 0) {
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Errors << "%ssa" << WrapperOp->ID() << ": Had destination but with no size" << std::endl;
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OrderedNode *BlockNode = HeaderOp->Blocks.GetNode(ListBegin);
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while (1) {
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auto BlockIROp = BlockNode->Op(DataBegin)->CW<FEXCore::IR::IROp_CodeBlock>();
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LogMan::Throw::A(BlockIROp->Header.Op == OP_CODEBLOCK, "IR type failed to be a code block");
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CurrentBlock = &OffsetToBlockMap.try_emplace(BlockNode->Wrapped(ListBegin).ID()).first->second;
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// We grab these nodes this way so we can iterate easily
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auto CodeBegin = CurrentIR.at(BlockIROp->Begin);
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auto CodeLast = CurrentIR.at(BlockIROp->Last);
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while (1) {
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auto CodeOp = CodeBegin();
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OrderedNode *CodeNode = CodeOp->GetNode(ListBegin);
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auto IROp = CodeNode->Op(DataBegin);
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uint8_t OpSize = IROp->Size;
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if (IROp->HasDest) {
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HadError |= OpSize == 0;
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// Does the op have a destination of size 0?
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if (OpSize == 0) {
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Errors << "%ssa" << CodeOp->ID() << ": Had destination but with no size" << std::endl;
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}
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// Does the node have zero uses? Should have been DCE'd
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if (RealNode->GetUses() == 0) {
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HadWarning |= true;
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Warnings << "%ssa" << CodeOp->ID() << ": Destination created but had no uses" << std::endl;
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}
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}
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if (RealNode->GetUses() == 0) {
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HadError |= true;
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Errors << "%ssa" << WrapperOp->ID() << ": Destination created but had no uses" << std::endl;
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uint8_t NumArgs = IR::GetArgs(IROp->Op);
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for (uint32_t i = 0; i < NumArgs; ++i) {
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OrderedNodeWrapper Arg = IROp->Args[i];
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// Does the SSA(with RA) argument have an invalid argument?
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if (Arg.ID() == 0) {
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HadError |= true;
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Errors << "%ssa" << CodeOp->ID() <<": Arg[" << i << "] has invalid target of %ssa0" << std::endl;
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}
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// Was an argument defined after this node?
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if (Arg.ID() >= CodeOp->ID()) {
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HadError |= true;
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Errors << "%ssa" << CodeOp->ID() << ": Arg[" << i << "] has definition after use at %ssa" << Arg.ID() << std::endl;
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}
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}
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switch (IROp->Op) {
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case IR::OP_EXITFUNCTION:
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case IR::OP_ENDFUNCTION: {
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CurrentBlock->HasExit = true;
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break;
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}
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case IR::OP_CONDJUMP: {
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auto Op = IROp->C<IR::IROp_CondJump>();
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OrderedNode const *TrueTargetNode = Op->Header.Args[1].GetNode(ListBegin);
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OrderedNode const *FalseTargetNode = Op->Header.Args[1].GetNode(ListBegin);
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CurrentBlock->Successors.emplace_back(TrueTargetNode);
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CurrentBlock->Successors.emplace_back(FalseTargetNode);
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FEXCore::IR::IROp_Header const *TrueTargetOp = TrueTargetNode->Op(DataBegin);
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FEXCore::IR::IROp_Header const *FalseTargetOp = FalseTargetNode->Op(DataBegin);
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if (TrueTargetOp->Op != OP_CODEBLOCK) {
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HadError |= true;
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Errors << "CondJump %ssa" << CodeOp->ID() << ": True Target Jumps to Op that isn't the begining of a block" << std::endl;
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}
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else {
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auto Block = OffsetToBlockMap.try_emplace(Op->Header.Args[1].ID()).first;
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Block->second.Predecessors.emplace_back(BlockNode);
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}
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if (FalseTargetOp->Op != OP_CODEBLOCK) {
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HadError |= true;
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Errors << "CondJump %ssa" << CodeOp->ID() << ": False Target Jumps to Op that isn't the begining of a block" << std::endl;
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}
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else {
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auto Block = OffsetToBlockMap.try_emplace(Op->Header.Args[2].ID()).first;
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Block->second.Predecessors.emplace_back(BlockNode);
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}
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break;
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}
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case IR::OP_JUMP: {
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auto Op = IROp->C<IR::IROp_Jump>();
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OrderedNode const *TargetNode = Op->Header.Args[0].GetNode(ListBegin);
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CurrentBlock->Successors.emplace_back(TargetNode);
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FEXCore::IR::IROp_Header const *TargetOp = TargetNode->Op(DataBegin);
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if (TargetOp->Op != OP_CODEBLOCK) {
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HadError |= true;
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Errors << "Jump %ssa" << CodeOp->ID() << ": Jump to Op that isn't the begining of a block" << std::endl;
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}
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else {
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auto Block = OffsetToBlockMap.try_emplace(Op->Header.Args[0].ID()).first;
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Block->second.Predecessors.emplace_back(BlockNode);
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}
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break;
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}
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default:
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// LogMan::Msg::A("Unknown IR Op: %d(%s)", IROp->Op, FEXCore::IR::GetName(IROp->Op).data());
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break;
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}
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// CodeLast is inclusive. So we still need to dump the CodeLast op as well
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if (CodeBegin == CodeLast) {
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break;
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}
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++CodeBegin;
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}
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uint8_t NumArgs = IR::GetArgs(IROp->Op);
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for (uint8_t i = 0; i < NumArgs; ++i) {
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OrderedNodeWrapper Arg = IROp->Args[i];
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if (Arg.ID() == 0) {
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HadError |= true;
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Errors << "Op" << WrapperOp->ID() <<": Arg[" << i << "] has invalid target of %ssa0" << std::endl;
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}
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// Blocks can only have zero (Exit), 1 (Unconditional branch) or 2 (Conditional) successors
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size_t NumSuccessors = CurrentBlock->Successors.size();
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if (NumSuccessors > 2) {
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HadError |= true;
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Errors << "%ssa" << BlockNode->Wrapped(ListBegin).ID() << " Has " << NumSuccessors << " successors which is too many" << std::endl;
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}
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switch (IROp->Op) {
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case OP_BEGINBLOCK: {
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HadError |= InBlock;
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if (InBlock) {
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Errors << "BasicBlock " << WrapperOp->ID() << ": Begin in middle of block" << std::endl;
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}
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auto Block = OffsetToBlockMap.try_emplace(WrapperOp->ID()).first;
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CurrentBlock = &Block->second;
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CurrentBlock->Begin = WrapperOp;
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InBlock = true;
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break;
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if (BlockIROp->Next.ID() == 0) {
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break;
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} else {
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BlockNode = BlockIROp->Next.GetNode(ListBegin);
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}
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case OP_ENDBLOCK: {
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HadError |= !InBlock;
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if (!InBlock) {
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Errors << "BasicBlock " << WrapperOp->ID() << ": End loose without a begin" << std::endl;
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}
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if (CurrentBlock) {
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// XXX: Enable once fallthrough is handled
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// HadError |= !CurrentBlock->HasExit && CurrentBlock->Successors.size() == 0;
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// if (!CurrentBlock->HasExit && CurrentBlock->Successors.size() == 0) {
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// Errors << "BasicBlock " << WrapperOp->ID() << ": Didn't have an exit and didn't have any successors. (Fallthrough?)" << std::endl;
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// }
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CurrentBlock->End = WrapperOp;
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CurrentBlock = nullptr;
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}
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InBlock = false;
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break;
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}
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case IR::OP_EXITFUNCTION:
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case IR::OP_ENDFUNCTION: {
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if (CurrentBlock) {
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CurrentBlock->HasExit = true;
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}
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break;
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}
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case IR::OP_CONDJUMP: {
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auto Op = IROp->C<IR::IROp_CondJump>();
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auto IterLocation = NodeWrapperIterator(ListBegin, Op->Header.Args[1]);
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if (CurrentBlock) {
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CurrentBlock->Successors.emplace_back(IterLocation());
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}
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OrderedNode *TargetNode = IterLocation()->GetNode(ListBegin);
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FEXCore::IR::IROp_Header *TargetOp = TargetNode->Op(DataBegin);
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HadError |= TargetOp->Op != OP_BEGINBLOCK;
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if (TargetOp->Op != OP_BEGINBLOCK) {
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Errors << "CondJump " << WrapperOp->ID() << ": CondJump to Op that isn't the begining of a block" << std::endl;
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}
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else {
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auto Block = OffsetToBlockMap.try_emplace(IterLocation()->NodeOffset).first;
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Block->second.Predecessors.emplace_back(CurrentBlock->Begin);
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}
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break;
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}
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case IR::OP_JUMP: {
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auto Op = IROp->C<IR::IROp_Jump>();
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auto IterLocation = NodeWrapperIterator(ListBegin, Op->Header.Args[0]);
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if (CurrentBlock) {
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CurrentBlock->Successors.emplace_back(IterLocation());
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}
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OrderedNode *TargetNode = IterLocation()->GetNode(ListBegin);
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FEXCore::IR::IROp_Header *TargetOp = TargetNode->Op(DataBegin);
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HadError |= TargetOp->Op != OP_BEGINBLOCK;
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if (TargetOp->Op != OP_BEGINBLOCK) {
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Errors << "Jump " << WrapperOp->ID() << ": Jump to Op that isn't the begining of a block" << std::endl;
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}
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else {
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auto Block = OffsetToBlockMap.try_emplace(IterLocation()->NodeOffset).first;
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Block->second.Predecessors.emplace_back(CurrentBlock->Begin);
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}
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break;
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}
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default:
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//LogMan::Msg::A("Unknown IR Op: %d(%s)", IROp->Op, FEXCore::IR::GetName(IROp->Op).data());
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break;
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}
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++Begin;
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}
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if (HadError) {
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std::stringstream Out;
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std::stringstream Out;
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HadWarning = false;
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if (HadError || HadWarning) {
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FEXCore::IR::Dump(&Out, &CurrentIR);
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std::cerr << Errors.str() << std::endl << Out.str() << std::endl;
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if (HadError) {
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Out << "Errors:" << std::endl << Errors.str() << std::endl;
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}
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if (HadWarning) {
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Out << "Warnings:" << std::endl << Warnings.str() << std::endl;
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}
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std::cerr << Out.str() << std::endl;
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}
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return false;
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}
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