JIT: Moves Arm64 JIT up one folder

We have only one JIT, there is no reason to subfolder this. Move it up
one folder.

NFC

FEXCore/Source/CMakeLists.txt

@@ -105,17 +105,17 @@ set (SRCS
   Interface/Core/ArchHelpers/Arm64Emitter.cpp
   Interface/Core/Dispatcher/Dispatcher.cpp
   Interface/Core/Interpreter/Fallbacks/InterpreterFallbacks.cpp
-  Interface/Core/JIT/Arm64/JIT.cpp
-  Interface/Core/JIT/Arm64/ALUOps.cpp
-  Interface/Core/JIT/Arm64/AtomicOps.cpp
-  Interface/Core/JIT/Arm64/BranchOps.cpp
-  Interface/Core/JIT/Arm64/ConversionOps.cpp
-  Interface/Core/JIT/Arm64/EncryptionOps.cpp
-  Interface/Core/JIT/Arm64/MemoryOps.cpp
-  Interface/Core/JIT/Arm64/MiscOps.cpp
-  Interface/Core/JIT/Arm64/MoveOps.cpp
-  Interface/Core/JIT/Arm64/VectorOps.cpp
-  Interface/Core/JIT/Arm64/Arm64Relocations.cpp
+  Interface/Core/JIT/JIT.cpp
+  Interface/Core/JIT/ALUOps.cpp
+  Interface/Core/JIT/AtomicOps.cpp
+  Interface/Core/JIT/BranchOps.cpp
+  Interface/Core/JIT/ConversionOps.cpp
+  Interface/Core/JIT/EncryptionOps.cpp
+  Interface/Core/JIT/MemoryOps.cpp
+  Interface/Core/JIT/MiscOps.cpp
+  Interface/Core/JIT/MoveOps.cpp
+  Interface/Core/JIT/VectorOps.cpp
+  Interface/Core/JIT/Arm64Relocations.cpp
   Interface/Core/X86Tables/BaseTables.cpp
   Interface/Core/X86Tables/DDDTables.cpp
   Interface/Core/X86Tables/H0F38Tables.cpp

FEXCore/Source/Interface/Core/Core.cpp

@@ -9,14 +9,14 @@ $end_info$
 */
 
 #include <cstdint>
-#include "Interface/Core/ArchHelpers//Arm64Emitter.h"
+#include "Interface/Core/ArchHelpers/Arm64Emitter.h"
 #include "Interface/Core/LookupCache.h"
 #include "Interface/Core/CPUBackend.h"
 #include "Interface/Core/CPUID.h"
 #include "Interface/Core/Frontend.h"
 #include "Interface/Core/ObjectCache/ObjectCacheService.h"
 #include "Interface/Core/OpcodeDispatcher.h"
-#include "Interface/Core/JIT/JITCore.h"
+#include "Interface/Core/JIT/JITClass.h"
 #include "Interface/Core/Dispatcher/Dispatcher.h"
 #include "Interface/Core/X86Tables/X86Tables.h"
 #include "Interface/IR/IR.h"

FEXCore/Source/Interface/Core/JIT/ALUOps.cpp

@@ -8,7 +8,7 @@ $end_info$
 #include "CodeEmitter/Emitter.h"
 #include "FEXCore/IR/IR.h"
 #include "Interface/Context/Context.h"
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
 
 namespace FEXCore::CPU {

FEXCore/Source/Interface/Core/JIT/Arm64Relocations.cpp

@@ -6,7 +6,7 @@ desc: relocation logic of the arm64 splatter backend
 $end_info$
 */
 #include "Interface/Context/Context.h"
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 #include <FEXCore/Core/Thunks.h>
 

FEXCore/Source/Interface/Core/JIT/AtomicOps.cpp

@@ -7,7 +7,7 @@ $end_info$
 
 #include "Interface/Context/Context.h"
 #include "Interface/Core/Dispatcher/Dispatcher.h"
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void Arm64JITCore::Op_##x(IR::IROp_Header const* IROp, IR::NodeID Node)

FEXCore/Source/Interface/Core/JIT/BranchOps.cpp

@@ -9,7 +9,7 @@ $end_info$
 #include "FEXCore/IR/IR.h"
 #include "Interface/Core/LookupCache.h"
 
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 #include <FEXCore/Core/Thunks.h>
 #include <FEXCore/Core/X86Enums.h>

FEXCore/Source/Interface/Core/JIT/ConversionOps.cpp

@@ -5,7 +5,7 @@ tags: backend|arm64
 $end_info$
 */
 
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void Arm64JITCore::Op_##x(IR::IROp_Header const* IROp, IR::NodeID Node)

FEXCore/Source/Interface/Core/JIT/EncryptionOps.cpp

@@ -5,7 +5,7 @@ tags: backend|arm64
 $end_info$
 */
 
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void Arm64JITCore::Op_##x(IR::IROp_Header const* IROp, IR::NodeID Node)

FEXCore/Source/Interface/Core/JIT/JIT.cpp

@@ -16,7 +16,7 @@ $end_info$
 #include "Interface/Core/LookupCache.h"
 
 #include "Interface/Core/Dispatcher/Dispatcher.h"
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
 

FEXCore/Source/Interface/Core/JIT/JITClass.h

@@ -352,4 +352,7 @@ private:
 #undef DEF_OP
 };
 
+[[nodiscard]]
+fextl::unique_ptr<CPUBackend> CreateArm64JITCore(FEXCore::Context::ContextImpl* ctx, FEXCore::Core::InternalThreadState* Thread);
+
 } // namespace FEXCore::CPU

FEXCore/Source/Interface/Core/JIT/JITCore.h

@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: MIT
-#pragma once
-
-#include "Interface/Core/CPUBackend.h"
-#include <FEXCore/fextl/memory.h>
-
-namespace FEXCore::Context {
-class ContextImpl;
-}
-
-namespace FEXCore::Core {
-struct InternalThreadState;
-}
-
-namespace FEXCore::CPU {
-class CPUBackend;
-
-[[nodiscard]]
-fextl::unique_ptr<CPUBackend> CreateArm64JITCore(FEXCore::Context::ContextImpl* ctx, FEXCore::Core::InternalThreadState* Thread);
-
-} // namespace FEXCore::CPU

FEXCore/Source/Interface/Core/JIT/MemoryOps.cpp

@@ -9,7 +9,7 @@ $end_info$
 #include "FEXCore/Utils/LogManager.h"
 #include "Interface/Context/Context.h"
 #include "Interface/Core/CPUID.h"
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 #include <FEXCore/Utils/CompilerDefs.h>
 #include <FEXCore/Utils/MathUtils.h>
 

FEXCore/Source/Interface/Core/JIT/MiscOps.cpp

@@ -10,7 +10,7 @@ $end_info$
 #endif
 
 #include "Interface/Context/Context.h"
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 #include "FEXCore/Debug/InternalThreadState.h"
 
 #include <FEXCore/Core/SignalDelegator.h>

FEXCore/Source/Interface/Core/JIT/MoveOps.cpp

@@ -5,7 +5,7 @@ tags: backend|arm64
 $end_info$
 */
 
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 namespace FEXCore::CPU {
 #define DEF_OP(x) void Arm64JITCore::Op_##x(IR::IROp_Header const* IROp, IR::NodeID Node)

FEXCore/Source/Interface/Core/JIT/VectorOps.cpp

@@ -6,7 +6,7 @@ $end_info$
 */
 
 #include "Interface/Core/Dispatcher/Dispatcher.h"
-#include "Interface/Core/JIT/Arm64/JITClass.h"
+#include "Interface/Core/JIT/JITClass.h"
 
 #include <FEXCore/Utils/MathUtils.h>