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OpcodeDispatcher: Handle VPSRAD (vector)
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@ -5934,6 +5934,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
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{OPD(1, 0b01, 0xE0), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VURAVG, 1>},
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{OPD(1, 0b01, 0xE1), 1, &OpDispatchBuilder::VPSRAOp<2>},
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{OPD(1, 0b01, 0xE2), 1, &OpDispatchBuilder::VPSRAOp<4>},
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{OPD(1, 0b01, 0xE3), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VURAVG, 2>},
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{OPD(1, 0b01, 0xE7), 1, &OpDispatchBuilder::VMOVVectorNTOp},
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@ -1478,6 +1478,8 @@ void OpDispatchBuilder::VPSRAOp(OpcodeArgs) {
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template
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void OpDispatchBuilder::VPSRAOp<2>(OpcodeArgs);
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template
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void OpDispatchBuilder::VPSRAOp<4>(OpcodeArgs);
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void OpDispatchBuilder::PSRLDQ(OpcodeArgs) {
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LOGMAN_THROW_A_FMT(Op->Src[1].IsLiteral(), "Src1 needs to be literal here");
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@ -221,7 +221,7 @@ void InitializeVEXTables() {
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{OPD(1, 0b01, 0xE0), 1, X86InstInfo{"VPAVGB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
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{OPD(1, 0b01, 0xE1), 1, X86InstInfo{"VPSRAW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
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{OPD(1, 0b01, 0xE2), 1, X86InstInfo{"VPSRAD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
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{OPD(1, 0b01, 0xE2), 1, X86InstInfo{"VPSRAD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
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{OPD(1, 0b01, 0xE3), 1, X86InstInfo{"VPAVGW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
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{OPD(1, 0b01, 0xE4), 1, X86InstInfo{"VPMULHUW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
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{OPD(1, 0b01, 0xE5), 1, X86InstInfo{"VPMULHW", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
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69
unittests/ASM/VEX/vpsrad.asm
Normal file
69
unittests/ASM/VEX/vpsrad.asm
Normal file
@ -0,0 +1,69 @@
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%ifdef CONFIG
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{
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"HostFeatures": ["AVX"],
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"RegData": {
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"XMM4": ["0x8042434445464748", "0x7172737475767778", "0x0000000000000000", "0x0000000000000000"],
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"XMM5": ["0xFFFF804200004546", "0x0000717200007576", "0x0000000000000000", "0x0000000000000000"],
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"XMM6": ["0xFFFFFFFF00000000", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
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"XMM7": ["0x8042434445464748", "0x7172737475767778", "0x0000000000000000", "0x0000000000000000"],
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"XMM8": ["0xFFFF804200004546", "0x0000717200007576", "0x0000000000000000", "0x0000000000000000"],
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"XMM9": ["0xFFFFFFFF00000000", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
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"XMM10": ["0x8042434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"],
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"XMM11": ["0xFFFF804200004546", "0x0000717200007576", "0x0000414200004546", "0x0000717200007576"],
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"XMM12": ["0xFFFFFFFF00000000", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"],
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"XMM13": ["0x8042434445464748", "0x7172737475767778", "0x4142434445464748", "0x7172737475767778"],
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"XMM14": ["0xFFFF804200004546", "0x0000717200007576", "0x0000414200004546", "0x0000717200007576"],
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"XMM15": ["0xFFFFFFFF00000000", "0x0000000000000000", "0x0000000000000000", "0x0000000000000000"]
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},
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"MemoryRegions": {
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"0x100000000": "4096"
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}
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}
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%endif
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lea rdx, [rel .data]
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vmovapd ymm0, [rdx + 32 * 0]
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vmovapd ymm1, [rdx + 32 * 1]
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vmovapd ymm2, [rdx + 32 * 2]
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vmovapd ymm3, [rdx + 32 * 3]
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vpsrad xmm4, xmm0, xmm1
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vpsrad xmm5, xmm0, xmm2
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vpsrad xmm6, xmm0, xmm3
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vpsrad xmm7, xmm0, [rdx + 32 * 1]
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vpsrad xmm8, xmm0, [rdx + 32 * 2]
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vpsrad xmm9, xmm0, [rdx + 32 * 3]
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vpsrad ymm10, ymm0, xmm1
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vpsrad ymm11, ymm0, xmm2
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vpsrad ymm12, ymm0, xmm3
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vpsrad ymm13, ymm0, [rdx + 32 * 1]
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vpsrad ymm14, ymm0, [rdx + 32 * 2]
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vpsrad ymm15, ymm0, [rdx + 32 * 3]
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hlt
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align 32
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.data:
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dq 0x8042434445464748
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dq 0x7172737475767778
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dq 0x4142434445464748
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dq 0x7172737475767778
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dq 0x0000000000000000
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dq 0x5152535455565758
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dq 0x5152535455565758
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dq 0x5152535455565758
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dq 0x0000000000000010
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dq 0x5152535455565758
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dq 0x5152535455565758
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dq 0x5152535455565758
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dq 0x0000000000000020
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dq 0x5152535455565758
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dq 0x5152535455565758
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dq 0x5152535455565758
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