HostFeatures: Adds support for FCMA

FEXCore/Source/Interface/Config/Config.json.in

@@ -74,7 +74,9 @@
           "ENABLECLZERO": "enableclzero",
           "DISABLECLZERO": "disableclzero",
           "ENABLEATOMICS": "enableatomics",
-          "DISABLEATOMICS": "disableatomics"
+          "DISABLEATOMICS": "disableatomics",
+          "ENABLEFCMA": "enablefcma",
+          "DISABLEFCMA": "disablefcma"
         },
         "Desc": [
           "Allows controlling of the CPU features in the JIT.",
@@ -88,7 +90,8 @@
           "\t{enable,disable}pmull128: Will force enable or disable pmull128 even if the host doesn't support it",
           "\t{enable,disable}rng: Will force enable or disable rng even if the host doesn't support it",
           "\t{enable,disable}clzero: Will force enable or disable clzero even if the host doesn't support it",
-          "\t{enable,disable}atomics: Will force enable or disable ARMv8.1 LSE atomics even if the host doesn't support it"
+          "\t{enable,disable}atomics: Will force enable or disable ARMv8.1 LSE atomics even if the host doesn't support it",
+          "\t{enable,disable}fcma: Will force enable or disable fcma even if the host doesn't support it"
         ]
       }
     },

FEXCore/Source/Interface/Core/HostFeatures.cpp

@@ -96,6 +96,10 @@ static void OverrideFeatures(HostFeatures *Features) {
   const bool EnableAtomics = HostFeatures() & FEXCore::Config::HostFeatures::ENABLEATOMICS;
   LogMan::Throw::AFmt(!(DisableAtomics && EnableAtomics), "Disabling and Enabling CPU features are mutually exclusive");
 
+  const bool DisableFCMA = HostFeatures() & FEXCore::Config::HostFeatures::DISABLEFCMA;
+  const bool EnableFCMA = HostFeatures() & FEXCore::Config::HostFeatures::ENABLEFCMA;
+  LogMan::Throw::AFmt(!(DisableFCMA && EnableFCMA), "Disabling and Enabling CPU features are mutually exclusive");
+
   if (EnableAVX) {
     Features->SupportsAVX = true;
   }
@@ -156,6 +160,12 @@ static void OverrideFeatures(HostFeatures *Features) {
   else if (DisableAtomics) {
     Features->SupportsAtomics = false;
   }
+  if (EnableFCMA) {
+    Features->SupportsFCMA = true;
+  }
+  else if (DisableFCMA) {
+    Features->SupportsFCMA = false;
+  }
 }
 
 HostFeatures::HostFeatures() {
@@ -181,6 +191,7 @@ HostFeatures::HostFeatures() {
   SupportsTSOImm9 = Features.Has(vixl::CPUFeatures::Feature::kRCpcImm);
   SupportsPMULL_128Bit = Features.Has(vixl::CPUFeatures::Feature::kPmull1Q);
   SupportsCSSC = Features.Has(vixl::CPUFeatures::Feature::kCSSC);
+  SupportsFCMA = Features.Has(vixl::CPUFeatures::Feature::kFcma);
 
   Supports3DNow = true;
   SupportsSSE4A = true;

FEXCore/include/FEXCore/Core/HostFeatures.h

@@ -31,6 +31,7 @@ class HostFeatures final {
     bool SupportsCLWB{};
     bool SupportsPMULL_128Bit{};
     bool SupportsCSSC{};
+    bool SupportsFCMA{};
 
     // Float exception behaviour
     bool SupportsFlushInputsToZero{};

Scripts/InstructionCountParser.py

@@ -46,12 +46,14 @@ class HostFeatures(Flag) :
     FEATURE_SVE256 = (1 << 1)
     FEATURE_CLZERO = (1 << 2)
     FEATURE_RNG    = (1 << 3)
+    FEATURE_FCMA   = (1 << 4)
 
 HostFeaturesLookup = {
     "SVE128"  : HostFeatures.FEATURE_SVE128,
     "SVE256"  : HostFeatures.FEATURE_SVE256,
     "CLZERO"  : HostFeatures.FEATURE_CLZERO,
     "RNG"     : HostFeatures.FEATURE_RNG,
+    "FCMA"    : HostFeatures.FEATURE_FCMA,
 }
 
 def GetHostFeatures(data):

Source/Tools/CodeSizeValidation/Main.cpp

@@ -384,6 +384,7 @@ int main(int argc, char **argv, char **const envp) {
     FEATURE_SVE256 = (1U << 1),
     FEATURE_CLZERO = (1U << 2),
     FEATURE_RNG    = (1U << 3),
+    FEATURE_FCMA   = (1U << 4),
   };
 
   uint64_t SVEWidth = 0;
@@ -402,6 +403,9 @@ int main(int argc, char **argv, char **const envp) {
   if (TestHeaderData->EnabledHostFeatures & FEATURE_RNG) {
     HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLERNG);
   }
+  if (TestHeaderData->EnabledHostFeatures & FEATURE_FCMA) {
+    HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLEFCMA);
+  }
 
   // Always enable ARMv8.1 LSE atomics.
   HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLEATOMICS);
@@ -418,6 +422,9 @@ int main(int argc, char **argv, char **const envp) {
   if (TestHeaderData->DisabledHostFeatures & FEATURE_RNG) {
     HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::DISABLERNG);
   }
+  if (TestHeaderData->DisabledHostFeatures & FEATURE_FCMA) {
+    HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::DISABLEFCMA);
+  }
   FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_HOSTFEATURES, fextl::fmt::format("{}", HostFeatureControl));
   FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_FORCESVEWIDTH, fextl::fmt::format("{}", SVEWidth));
 

unittests/InstructionCountCI/Secondary_OpSize.json

@@ -4,7 +4,8 @@
     "EnabledHostFeatures": [],
     "DisabledHostFeatures": [
       "SVE128",
-      "SVE256"
+      "SVE256",
+      "FCMA"
     ]
   },
   "Instructions": {

unittests/InstructionCountCI/Secondary_REPNE.json

@@ -4,7 +4,8 @@
     "EnabledHostFeatures": [],
     "DisabledHostFeatures": [
       "SVE128",
-      "SVE256"
+      "SVE256",
+      "FCMA"
     ]
   },
   "Instructions": {

unittests/InstructionCountCI/VEX_map1.json

@@ -5,7 +5,9 @@
       "SVE128",
       "SVE256"
     ],
-    "DisabledHostFeatures": []
+    "DisabledHostFeatures": [
+      "FCMA"
+    ]
   },
   "Instructions": {
     "vmovups xmm0, [rax]": {