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OpcodeDispatcher: Handle VPMOVSXBQ

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This commit is contained in:
lioncash 2022-12-15 17:56:09 +00:00
parent d7eab5f787
commit ce12ed60ae
4 changed files with 37 additions and 1 deletions
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1
External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp vendored
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@ -5961,6 +5961,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
{OPD(2, 0b01, 0x20), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 2, true>},
{OPD(2, 0b01, 0x21), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 4, true>},
{OPD(2, 0b01, 0x22), 1, &OpDispatchBuilder::AVXExtendVectorElements<1, 8, true>},
{OPD(2, 0b01, 0x29), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VCMPEQ, 8>},
{OPD(2, 0b01, 0x2A), 1, &OpDispatchBuilder::VMOVVectorNTOp},

2
External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp vendored
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@ -2704,6 +2704,8 @@ template
void OpDispatchBuilder::AVXExtendVectorElements<1, 2, true>(OpcodeArgs);
template
void OpDispatchBuilder::AVXExtendVectorElements<1, 4, true>(OpcodeArgs);
template
void OpDispatchBuilder::AVXExtendVectorElements<1, 8, true>(OpcodeArgs);
OrderedNode* OpDispatchBuilder::VectorRoundImpl(OpcodeArgs, size_t ElementSize,
OrderedNode *Src, uint64_t Mode) {

2
External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp vendored
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@ -291,7 +291,7 @@ void InitializeVEXTables() {
{OPD(2, 0b01, 0x20), 1, X86InstInfo{"VPMOVSXBW", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x21), 1, X86InstInfo{"VPMOVSXBD", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_32BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x22), 1, X86InstInfo{"VPMOVSXBQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x22), 1, X86InstInfo{"VPMOVSXBQ", TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_16BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0, nullptr}},
{OPD(2, 0b01, 0x23), 1, X86InstInfo{"VPMOVSXWD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x24), 1, X86InstInfo{"VPMOVSXWQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
{OPD(2, 0b01, 0x25), 1, X86InstInfo{"VPMOVSXDQ", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},

33
unittests/ASM/VEX/vpmovsxbq.asm Normal file
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@ -0,0 +1,33 @@
%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM0": ["0x4142434485868788", "0x5152535455565758", "0x4142434485868788", "0x5152535455565758"],
"XMM1": ["0xFFFFFFFFFFFFFF88", "0xFFFFFFFFFFFFFF87", "0x0000000000000000", "0x0000000000000000"],
"XMM2": ["0xFFFFFFFFFFFFFF88", "0xFFFFFFFFFFFFFF87", "0xFFFFFFFFFFFFFF86", "0xFFFFFFFFFFFFFF85"],
"XMM3": ["0xFFFFFFFFFFFFFF88", "0xFFFFFFFFFFFFFF87", "0x0000000000000000", "0x0000000000000000"],
"XMM4": ["0xFFFFFFFFFFFFFF88", "0xFFFFFFFFFFFFFF87", "0xFFFFFFFFFFFFFF86", "0xFFFFFFFFFFFFFF85"]
}
}
%endif
lea rdx, [rel .data]
vmovapd ymm0, [rdx]
; Memory operands
vpmovsxbq xmm1, [rdx]
vpmovsxbq ymm2, [rdx]
; Register only
vpmovsxbq xmm3, xmm0
vpmovsxbq ymm4, xmm0
hlt
align 32
.data:
dq 0x4142434485868788
dq 0x5152535455565758
dq 0x4142434485868788
dq 0x5152535455565758