IR: Add infrastructure for modelling flag clobbers

Lots of instructions clobber NZCV inadvertently but are not intended to write to
the host flags from the IR point-of-view. As an example, Abs logically has no
side effects but physically clobbers NZCV due to its cmp/csneg impl on non-CSSC
hw. Add infrastructure to model this in the IR so we can deal with it when we
start using NZCV for things.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

FEXCore/Scripts/json_ir_generator.py

@@ -46,6 +46,7 @@ class OpDefinition:
     NumElements: str
     OpClass: str
     HasSideEffects: bool
+    ImplicitFlagClobber: bool
     RAOverride: int
     SwitchGen: bool
     ArgPrinter: bool
@@ -67,6 +68,7 @@ class OpDefinition:
         self.OpClass = None
         self.OpSize = 0
         self.HasSideEffects = False
+        self.ImplicitFlagClobber = False
         self.RAOverride = -1
         self.SwitchGen = True
         self.ArgPrinter = True
@@ -219,6 +221,9 @@ def parse_ops(ops):
             if "HasSideEffects" in op_val:
                 OpDef.HasSideEffects = bool(op_val["HasSideEffects"])
 
+            if "ImplicitFlagClobber" in op_val:
+                OpDef.ImplicitFlagClobber = bool(op_val["ImplicitFlagClobber"])
+
             if "ArgPrinter" in op_val:
                 OpDef.ArgPrinter = bool(op_val["ArgPrinter"])
 
@@ -372,6 +377,7 @@ def print_ir_sizes():
     output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] uint8_t GetRAArgs(IROps Op);\n")
     output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] FEXCore::IR::RegisterClassType GetRegClass(IROps Op);\n\n")
     output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] bool HasSideEffects(IROps Op);\n")
+    output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] bool ImplicitFlagClobber(IROps Op);\n")
     output_file.write("[[nodiscard, gnu::const, gnu::visibility(\"default\")]] bool GetHasDest(IROps Op);\n")
 
     output_file.write("#undef IROP_SIZES\n")
@@ -465,15 +471,17 @@ def print_ir_getraargs():
 def print_ir_hassideeffects():
     output_file.write("#ifdef IROP_HASSIDEEFFECTS_IMPL\n")
 
-    output_file.write("constexpr std::array<uint8_t, OP_LAST + 1> SideEffects = {\n")
-    for op in IROps:
-        output_file.write("\t{},\n".format(("true" if op.HasSideEffects else "false")))
+    for array, prop in [("SideEffects", "HasSideEffects"),
+                        ("ImplicitFlagClobbers", "ImplicitFlagClobber")]:
+        output_file.write(f"constexpr std::array<uint8_t, OP_LAST + 1> {array} = {{\n")
+        for op in IROps:
+            output_file.write("\t{},\n".format(("true" if getattr(op, prop) else "false")))
 
-    output_file.write("};\n\n")
+        output_file.write("};\n\n")
 
-    output_file.write("bool HasSideEffects(IROps Op) {\n")
-    output_file.write("  return SideEffects[Op];\n")
-    output_file.write("}\n")
+        output_file.write(f"bool {prop}(IROps Op) {{\n")
+        output_file.write(f"  return {array}[Op];\n")
+        output_file.write("}\n")
 
     output_file.write("#undef IROP_HASSIDEEFFECTS_IMPL\n")
     output_file.write("#endif\n\n")
@@ -642,6 +650,10 @@ def print_ir_allocator_helpers():
 
             output_file.write(") {\n")
 
+            # Save NZCV if needed before clobbering NZCV
+            if op.ImplicitFlagClobber:
+                output_file.write("\t\tSaveNZCV();")
+
             output_file.write("\t\tauto Op = AllocateOp<IROp_{}, IROps::OP_{}>();\n".format(op.Name, op.Name.upper()))
 
             if op.SSAArgNum != 0:

FEXCore/Source/Interface/Core/OpcodeDispatcher.h

@@ -894,6 +894,10 @@ public:
     }
   }
 
+protected:
+  void SaveNZCV() override {
+  }
+
 private:
   enum class SelectionFlag {
     Nothing,  // must rely on x86 flags

FEXCore/Source/Interface/IR/Passes/ConstProp.cpp

@@ -277,7 +277,8 @@ void ConstProp::CodeMotionAroundSelects(IREmitter *IREmit, const IRListView& Cur
   for (auto [BlockNode, BlockIROp] : CurrentIR.GetBlocks()) {
     auto BlockOp = BlockIROp->CW<FEXCore::IR::IROp_CodeBlock>();
     for (auto [UnaryOpNode, UnaryOpHdr] : CurrentIR.GetCode(BlockNode)) {
-      if (IR::GetArgs(UnaryOpHdr->Op) == 1 && !HasSideEffects(UnaryOpHdr->Op)) {
+      if (IR::GetArgs(UnaryOpHdr->Op) == 1 && !HasSideEffects(UnaryOpHdr->Op)
+                                           && !ImplicitFlagClobber(UnaryOpHdr->Op)) {
         // could be moved
         auto SelectOpNode = IREmit->UnwrapNode(UnaryOpHdr->Args[0]);
         auto SelectOpHdr = IREmit->GetOpHeader(UnaryOpHdr->Args[0]);

FEXCore/include/FEXCore/IR/IREmitter.h

@@ -27,6 +27,8 @@ friend class FEXCore::IR::PassManager;
       ResetWorkingList();
     }
 
+    virtual ~IREmitter() = default;
+
     void ReownOrClaimBuffer() {
       DualListData.ReownOrClaimBuffer();
     }
@@ -332,6 +334,10 @@ friend class FEXCore::IR::PassManager;
       return Ptr;
     }
 
+    virtual void SaveNZCV() {
+      // Overriden by dispatcher, stubbed for IR tests
+    }
+
     OrderedNode *CurrentWriteCursor = nullptr;
 
     // These could be combined with a little bit of work to be more efficient with memory usage. Isn't a big deal