Ryan Houdek
d29139d88a
AVX128: Implement support for vextract{i,f}128
2024-06-24 14:27:19 -04:00
Ryan Houdek
317575ba99
AVX128: Implement support for cvtdq2{ps,pd}
2024-06-24 14:27:19 -04:00
Ryan Houdek
d4f2638a2e
AVX128: Implement support for cvt{t,}pd2pq
2024-06-24 14:27:19 -04:00
Ryan Houdek
b67d9be227
AVX128: Implement support for vcvt{pd2ps,ps2pd}
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Fairly complex set of instructions due to the edge cases.
2024-06-24 14:27:19 -04:00
Ryan Houdek
d52add8fad
AVX128: Implement support for vcvt{ss2sd,sd2ss}
2024-06-24 14:27:19 -04:00
Ryan Houdek
aa9159d25c
AVX128: Implement support for vpmulh{u,}w
2024-06-24 14:27:19 -04:00
Ryan Houdek
94c777259e
AVX128: Implements support for vpmulhrsw
2024-06-24 14:27:19 -04:00
Ryan Houdek
c9f8fa5662
AVX128: Implement support for vpmul{u,}dq
2024-06-24 14:27:19 -04:00
Ryan Houdek
64ee6b119e
AVX128: Implement support for vaddsubp{s,d}
2024-06-24 14:27:19 -04:00
Ryan Houdek
d2ec9a8936
AVX128: Implement support for vpsubsw
2024-06-24 14:27:19 -04:00
Ryan Houdek
2a927453f7
AVX128: Implement support for vphsub{w,d}
2024-06-24 14:27:19 -04:00
Ryan Houdek
c19d489c9a
AVX128: Implement support for vinsertps
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This one actually reuses the core base implementation which is nice.
2024-06-24 14:27:19 -04:00
Ryan Houdek
6012eb051b
AVX128: Implement support for vinsert{f128,i128}
2024-06-24 14:27:19 -04:00
Alyssa Rosenzweig
3974746473
OpcodeDispatcher: tweak PHSUBOpImpl
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-24 14:14:23 -04:00
Alyssa Rosenzweig
e1bcdcf387
OpcodeDispatcher: tweak PHSUBSOpImpl signature
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-24 14:14:23 -04:00
Alyssa Rosenzweig
fd5fbddae9
OpcodeDispatcher: tweak PMULLOpImpl for avx128
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-24 14:14:23 -04:00
Alyssa Rosenzweig
8ff72beddb
OpcodeDispatcher: tweak PMULHRSWOpImpl signature for avx128
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-24 14:14:23 -04:00
Alyssa Rosenzweig
cba5f7877b
OpcodeDispatcher: tweak ADDSUBPOpImpl signature for AVX128
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-24 14:14:23 -04:00
Alyssa Rosenzweig
9d7e9fd9fc
OpcodeDispatcher: add AVX128_Zext helper
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should let us clean up a lot.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-24 14:14:23 -04:00
Ryan Houdek
082a0baff3
JIT: Implement missing Vector_FToF2
2024-06-24 14:14:23 -04:00
Ryan Houdek
b2db04f5d7
Merge pull request #3745 from Sonicadvance1/add_x86_cmake_assert_back
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Adds back cmake error on x86-64 hosts
2024-06-24 06:44:33 -07:00
Alyssa Rosenzweig
be8ff9ccb9
Merge pull request #3740 from Sonicadvance1/avx_12
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AVX128: More various instructions
2024-06-24 09:28:40 -04:00
Ryan Houdek
9c531d97b0
AVX128: Implements the various vector shift instructions
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These are very closely related to each other so it makes sense to
implement the roughly three different families in one commit.
2024-06-24 09:20:19 -04:00
Ryan Houdek
055d8d75a2
Revert "CI: Drop use of obsolete ENABLE_X86_HOST_DEBUG setting"
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This reverts commit a054b998c5
2024-06-24 06:05:19 -07:00
Ryan Houdek
9fcf79ce0e
Adds back cmake error on x86-64 hosts
2024-06-24 06:05:19 -07:00
Ryan Houdek
6edf4619d4
Merge pull request #3742 from Sonicadvance1/export_avx_reg_helpers
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FEXCore: Implement AVX reconstruction helpers
2024-06-24 05:57:44 -07:00
Ryan Houdek
8f769ce5a3
Merge pull request #3743 from alyssarosenzweig/cleanup/literal
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X86Tables: add Literal() helper
2024-06-23 13:45:42 -07:00
Ryan Houdek
96ac71750a
Wow64: Use SSE register reconstruction helpers
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It doesn't support AVX today but it should do in the future.
2024-06-21 17:13:56 -04:00
Ryan Houdek
d0852cf1bb
TestHarnessRunner: Reconverge YMM registers if AVX is supported
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The TestHarness infrastructure doesn't understand the difference between
converged versus split view.
So fetch the split view immediately and reconverge the view manually
inside of the state object so it continues working with the split ymm
view.
2024-06-21 17:13:56 -04:00
Ryan Houdek
f5fea8af96
SignalDelegator: Use new YMM register reconstruction helpers
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Otherwise we would be setting up signal handlers with incorrect register
state.
2024-06-21 17:13:56 -04:00
Ryan Houdek
d52a1da501
FEXCore: Implement support for fetching/setting YMM registers
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Because we have two views of the YMM registers depending on if the host
supports SVE256 or not, add helper functions to fetch them correctly.
We fetch them in the way that Linux desires them in signal handlers, if
we want to return the converged view directly, that is easy to add
support for. It's unnecessary for now.
2024-06-21 17:13:56 -04:00
Ryan Houdek
abdcaa7c86
AVX128: Implement support for vpinsr{b,w,d,q}
2024-06-21 15:53:52 -04:00
Ryan Houdek
ad122cf463
AVX128: Implement support for vpmovmskb
2024-06-21 15:53:52 -04:00
Ryan Houdek
b58a57d225
AVX128: Implement support for vmovmskp{s,d}
2024-06-21 15:53:52 -04:00
Ryan Houdek
28d679de98
AVX128: Implement support for vpmov{s,z}{b,w,d}{w,d,q}
2024-06-21 15:53:52 -04:00
Ryan Houdek
d1dd055e6a
AVX128: Implement support for vpextr{b,w,d,q}
2024-06-21 15:53:52 -04:00
Ryan Houdek
3045578da4
AVX128: Implement vmov{d,q}
2024-06-21 15:53:52 -04:00
Ryan Houdek
9566dda73e
AVX128: Implement support for vcmps{s,d}
2024-06-21 15:53:52 -04:00
Ryan Houdek
a0ced2b685
AVX128: Implement support for vcmpp{s,d}
2024-06-21 15:50:26 -04:00
Ryan Houdek
df232f567b
AVX128: Implement support for v{add,sub,mul,fmin,fmax,fdiv,sqrt,rsqrt,rcp}s{s,d}
2024-06-21 15:50:05 -04:00
Ryan Houdek
2a6d6a9d13
AVX128: Implement support for v{u,}comis{s,d}
2024-06-21 15:50:05 -04:00
Alyssa Rosenzweig
cd03932bd1
OpcodeDispatcher: tweak InsertScalarFCMPOpImpl signature
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so AVX128 can reuse it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-21 15:50:05 -04:00
Ryan Houdek
2e5fa1ef1b
Merge pull request #3739 from Sonicadvance1/avx_11
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Frontend: Expose AVX W flag
2024-06-21 12:15:14 -07:00
Alyssa Rosenzweig
0c6c4cd532
OpcodeDispatcher: make FCMP more compact
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I told Ryan to change this for AVX, but it needs to be changed in the original
to match!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-21 15:02:10 -04:00
Alyssa Rosenzweig
25f8a87429
OpcodeDispatcher: use Literal() helper
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-21 14:58:49 -04:00
Alyssa Rosenzweig
edf1a7970d
X86Tables: add Literal() helper
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Any time we get the value of Literal, we want to assert that it's actually a
literal. We've been open coding this pattern sporadically throughout the
opcodedispatcher. Let's add an ergonomic helper to fetch the value of literal,
asserting that the value is indeed literal.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-21 14:46:46 -04:00
Ryan Houdek
fac9972bad
Merge pull request #3741 from alyssarosenzweig/cleanup/comiss
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OpcodeDispatcher: refactor Comiss helper
2024-06-21 11:43:05 -07:00
Alyssa Rosenzweig
9ecb960f3a
OpcodeDispatcher: refactor Comiss helper
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AVX128 will use this, it's not SSE-specific.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2024-06-21 14:23:20 -04:00
Ryan Houdek
3d26e23891
Merge pull request #3737 from Sonicadvance1/avx_10
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Arm64: Implement support for emulated masked vector loadstores
2024-06-21 11:04:01 -07:00
Ryan Houdek
7bbbd95775
Merge pull request #3736 from Sonicadvance1/avx_9
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AVX128: Some pun pickles, moves and conversions
2024-06-21 10:55:19 -07:00
