Ryan Houdek
|
e8e3c95349
|
AVX128: Implement support for vpsadbw
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
a87fa3f246
|
AVX128: Implement support for vpshufb
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
b31ad523f5
|
AVX128: Implement support for hsub{ps,pd}
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
34bce540ff
|
AVX128: Implement support for vpblendw/vpblendd/vblendps/vblendpd
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
8ea38e1d80
|
AVX128: Implement support for vpmaddwd
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
ce591a9541
|
AVX128: Implement support for vpmaddubsw
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
a48c65cd65
|
AVX128: Implement support for vphaddsw
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
c283f80f48
|
AVX128: Implement support for vhaddpd/vphadd{w,d}
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
d6bf276b5a
|
AVX128: Implement support for imm vpermil{ps,pd}
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
96a51650b1
|
AVX128: Implement support for vshuf{ps,pd}
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
f35a9c74a2
|
AVX128: Implement support for vpshuf{lw,hw,d}
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
e2457943f5
|
AVX128: Implement support for vperm{q,pd}
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
a05644172a
|
AVX128: Implement support for vdd{ps,pd}
|
2024-06-25 10:03:33 -04:00 |
|
Ryan Houdek
|
cc168ce0fb
|
VectorOps: Restructure DPPOpImpl. This will get reused by AVX128
|
2024-06-25 10:03:33 -04:00 |
|
Alyssa Rosenzweig
|
76bd22d279
|
OpcodeDispatcher: rm gratuitous lambda
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-25 10:03:33 -04:00 |
|
Alyssa Rosenzweig
|
18574f3cf1
|
OpcodeDispatcher: extract VPERMILRegOpImpl
for avx
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-25 10:03:33 -04:00 |
|
Alyssa Rosenzweig
|
665215ab47
|
OpcodeDispatcher: extract PTestOpImpl
for avx128
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-25 09:52:48 -04:00 |
|
Alyssa Rosenzweig
|
6009f36403
|
OpcodeDispatcher: extract VPERMDIndices
and rename things accordingly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-25 09:46:17 -04:00 |
|
Alyssa Rosenzweig
|
2580efda0d
|
OpcodeDispatcher: tweak VTestOp signature
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-25 09:46:17 -04:00 |
|
Alyssa Rosenzweig
|
21c6986dc7
|
OpcodeDispatcher: tweak HSUBPOpImpl
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 18:21:08 -04:00 |
|
Alyssa Rosenzweig
|
635720fe12
|
OpcodeDispatcher: tweak PHADDSOpImpl signature
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 18:21:08 -04:00 |
|
Ryan Houdek
|
8c751d7423
|
Merge pull request #3747 from Sonicadvance1/avx_14
AVX128: More instructions Part 3
|
2024-06-24 12:35:22 -07:00 |
|
Ryan Houdek
|
702ecf7637
|
AVX128: Implement support for round{ss,sd}
|
2024-06-24 15:19:08 -04:00 |
|
Ryan Houdek
|
0595f1e044
|
AVX128: Implement support for vround{ps,pd}
|
2024-06-24 15:19:08 -04:00 |
|
Ryan Houdek
|
cebb032bd3
|
AVX128: Implement support for vphminposuw
Reuses the non-AVX implementation since it only operates on 128-bits.
|
2024-06-24 15:19:08 -04:00 |
|
Ryan Houdek
|
8e32763ada
|
AVX128: Implements support for AVX string ops
Reuses the implementation from the SSE4.2 implementation, just
explicitly zeroes the hardcoded YMM0's upper 128-bits.
|
2024-06-24 15:19:08 -04:00 |
|
Ryan Houdek
|
7532337231
|
AVX128: Implements support for vector AES instructions
|
2024-06-24 15:19:08 -04:00 |
|
Ryan Houdek
|
4a66d4570e
|
AVX128: Implement support for a trinary operation with a passed in vector
Will be used for AES operations
|
2024-06-24 15:19:08 -04:00 |
|
Alyssa Rosenzweig
|
6f5e99d47d
|
OpcodeDispatcher: factor out TranslateRoundType
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 15:19:08 -04:00 |
|
Alyssa Rosenzweig
|
9ee9f5bddd
|
OpcodeDispatcher: tweak VectorRoundImpl signature
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 15:14:55 -04:00 |
|
Ryan Houdek
|
ddb9f6d3ad
|
Merge pull request #3746 from Sonicadvance1/avx_13
AVX128: More instructions
|
2024-06-24 11:40:52 -07:00 |
|
Ryan Houdek
|
d29139d88a
|
AVX128: Implement support for vextract{i,f}128
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
317575ba99
|
AVX128: Implement support for cvtdq2{ps,pd}
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
d4f2638a2e
|
AVX128: Implement support for cvt{t,}pd2pq
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
b67d9be227
|
AVX128: Implement support for vcvt{pd2ps,ps2pd}
Fairly complex set of instructions due to the edge cases.
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
d52add8fad
|
AVX128: Implement support for vcvt{ss2sd,sd2ss}
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
aa9159d25c
|
AVX128: Implement support for vpmulh{u,}w
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
94c777259e
|
AVX128: Implements support for vpmulhrsw
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
c9f8fa5662
|
AVX128: Implement support for vpmul{u,}dq
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
64ee6b119e
|
AVX128: Implement support for vaddsubp{s,d}
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
d2ec9a8936
|
AVX128: Implement support for vpsubsw
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
2a927453f7
|
AVX128: Implement support for vphsub{w,d}
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
c19d489c9a
|
AVX128: Implement support for vinsertps
This one actually reuses the core base implementation which is nice.
|
2024-06-24 14:27:19 -04:00 |
|
Ryan Houdek
|
6012eb051b
|
AVX128: Implement support for vinsert{f128,i128}
|
2024-06-24 14:27:19 -04:00 |
|
Alyssa Rosenzweig
|
3974746473
|
OpcodeDispatcher: tweak PHSUBOpImpl
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 14:14:23 -04:00 |
|
Alyssa Rosenzweig
|
e1bcdcf387
|
OpcodeDispatcher: tweak PHSUBSOpImpl signature
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 14:14:23 -04:00 |
|
Alyssa Rosenzweig
|
fd5fbddae9
|
OpcodeDispatcher: tweak PMULLOpImpl for avx128
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 14:14:23 -04:00 |
|
Alyssa Rosenzweig
|
8ff72beddb
|
OpcodeDispatcher: tweak PMULHRSWOpImpl signature for avx128
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 14:14:23 -04:00 |
|
Alyssa Rosenzweig
|
cba5f7877b
|
OpcodeDispatcher: tweak ADDSUBPOpImpl signature for AVX128
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 14:14:23 -04:00 |
|
Alyssa Rosenzweig
|
9d7e9fd9fc
|
OpcodeDispatcher: add AVX128_Zext helper
should let us clean up a lot.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
2024-06-24 14:14:23 -04:00 |
|