FEX-Emu/FEX
1
0
Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2025-01-27 09:11:50 +00:00
Code Issues Actions 6 Packages Projects Releases Wiki Activity
1,965 Commits 4 Branches 48 Tags
Commit Graph

1965 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Stefanos Kornilios Mitsis Poiitidis
74160f38c4 IR: Fix IREmitter::Copy 2021-01-21 21:01:27 +02:00
Stefanos Kornilios Mitsis Poiitidis
072067b5fd IR: Split parser from IRLoader, add IR::Parse() 2021-01-21 19:17:51 +02:00
Stefanos Kornilios Mitsis Poiitidis
773e5866b4
Merge pull request #666 from Sonicadvance1/handle_unaligned_caspal32 
Handle unaligned cmpxchg and cmpxchg8b on ARMv8.1+
 2021-01-21 13:30:18 +02:00
Stefanos Kornilios Mitsis Poiitidis
00ca576644 IRCompaction: Only memset in debug 2021-01-21 13:06:43 +02:00
Ryan Houdek
5226f779c3
Merge pull request #673 from FEX-Emu/skmp/fix-ir-printing 
IR: Fix Printing and Parsing for float conds
 2021-01-21 00:28:50 -08:00
Stefanos Kornilios Mitsis Poiitidis
036771d825 IR: Fix Printing and Parsing for float conds 2021-01-21 10:16:08 +02:00
Ryan Houdek
633ea045e5 Handles unaligned cmpxchg/cmpxchg8b in SIGBUS handler 
cmpxchg/cmpxchg8b doesn't have alignment requirements on x86, which means
applications rely on unaligned behaviour support with it.

Steam relies on this to work for a linked list array of jobs in some
internal job queueing system. It will end up always aligning by offsets
of 4 since it stores a couple of pointers.

Doesn't currently support the case of unaligned cmpxchg8b crossing a
cacheline, which ends up being semi-broken depending on which x86
behaviour the application is expected.
Intel CPUs do the "Big ring lock" or "split locks". Which means accesses
across cachelines are atomic.
AMD CPUs will tear the value across the cacheline, which is expected x86
behaviour by spec.

If they are expecting Intel behaviour, then that application is just
broken on non-Intel platforms unless they are fine with a tear.
 2021-01-20 16:07:50 -08:00
Stefanos Kornilios Mitsis Poiitidis
0e7db64ac7 RA: Run compation after spilling, not before 2021-01-21 01:01:02 +02:00
Stefanos Kornilios Mitsis Poiitidis
ac1036ac92 IR: Sync Invalid class with RA 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
9c462eb400 ConsProp: Revert to ordered set for identical codegen 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
8aef9cb6a7 RA: Exit after first spill per iteration is found 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
d3fc85e18d RA: Make spans at least 1 offset long 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
9f3ce47917 RA: Expire ending intervals before starting new ones 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
a9332e604a JIT/x64: Fix VAddV 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
e7e6b6654f RA: Cleanups 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
c3682f9a3b RA: Fix several bugs, get rid of virtual registers, remove unused complexity 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
47ee9af96c ConstProp: Keep pools in heap 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
10b6fb02c4 RA: Rename CalculatePrecessors to CalculatePredecessors 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
9c760ff83b RA: Get OP_JUMP/CONDJUMP without loop in CalculatePrecessors 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
f3e19ef015 DSE: No need to loop to find branching op 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
6bdf785223 DSE: Optimize map lookups 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
997650bafc DSE: Merge logic more for perf 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
56ca73191d DSE: Merge Flag/GPR/FPR passes for perf 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
900fc6d2a7 ConstProp: Switch maps to unordred_maps 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
af94e24ba3 RA: Simplify and optimize data structures 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
6380ab6bfd RA: Optimize register conflict handling 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
91ddc1dd38 RCLSE: Optimize FindMemberInfo to be O(1) 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
77d072e35c RA: Switch active set to also use BucketList 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis
e847f94b69 RA: rework ConstrainedRAPass::CalculateNodeInterference 2021-01-20 04:26:06 +02:00
Ryan Houdek
eb6386b921
Merge pull request #671 from FEX-Emu/skmp/ir-prettyprint 
IR: Pretty print %Invalid, don't print invalid regs
 2021-01-19 18:17:43 -08:00
Stefanos Kornilios Mitsis Poiitidis
c42c57af35 IR: Pretty print %Invalid, don't print invalid regs 2021-01-20 04:06:37 +02:00
Stefanos Kornilios Mitsis Poiitidis
814ca4746b
Merge pull request #669 from Sonicadvance1/workaround_llvm_native 
Works around Clang failing to identify new Kryo CPUs
 2021-01-20 03:48:55 +02:00
Ryan Houdek
921867de7e Works around Clang failing to identify new Kryo CPUs 
Some of the newer CPU cores in LLVM's source claim to be a Cortex-A73,
which means they become limited to an ARMv8.0 feature set.

This is what you get if you compile FEX with -mcpu=native

To work around this issue, manually parse /proc/cpuinfo ourselves and
pull out the CPU type to pass to clang directly.
This also fixes the issue that we were using -march on AArch64, which no
longer works on newer clang versions. We instead need to use mcpu or
mtune.

Should improve all atomic op performance outside of the JITs, where they
were turning in to loadstore exclusive pairs.
 2021-01-19 03:21:10 -08:00
Ryan Houdek
fa542a5b9d
Merge pull request #665 from FEX-Emu/skmp/continue-on-invalid-insn 
Frontend, OpDisp: Don't assert on invalid instructions
 2021-01-18 07:32:31 -08:00
Stefanos Kornilios Mitsis Poiitidis
567e315854 Frontend, OpDisp: Don't assert on invalid instructions 2021-01-18 17:19:11 +02:00
Stefanos Kornilios Mitsis Poiitidis
8ad32a135f
Merge pull request #660 from FEX-Emu/skmp/remove-debug-printfs 
OpDisp: Remove missed debug printf
 2021-01-18 11:32:30 +02:00
Ryan Houdek
108992de80
Merge pull request #653 from Sonicadvance1/add_O0 
Adds an option to disable optimization passes
FEX-2101 		2021-01-18 00:10:48 -08:00
Stefanos Kornilios Mitsis Poiitidis
aa0cd76e06 OpDisp: Remove missed debug printf 2021-01-18 10:03:31 +02:00
Ryan Houdek
544a1f307f Adds an option to disable optimization passes 
Instead of forcing someone to test by modifying code, allow a -O0 option
to be passed in.
Also added to FEXConfig GUI for easily touching.

Fixes #652
 2021-01-17 23:51:22 -08:00
Ryan Houdek
e7315d9a97
Merge pull request #339 from FEX-Emu/skmp/ir-constant-pooling 
ConstProp: Allocate constants once per block
 2021-01-17 23:49:31 -08:00
Ryan Houdek
fbe67db93b
Merge pull request #657 from FEX-Emu/skmp/block-ordering 
OpDisp: Improved Block Ordering
 2021-01-17 23:39:53 -08:00
Ryan Houdek
63f9b62594
Merge pull request #497 from FEX-Emu/skmp/block-linking 
Block linking
 2021-01-17 23:35:40 -08:00
Stefanos Kornilios Mitsis Poiitidis
8b93d0a278 Tests: Add a basic const pooling test 2021-01-16 17:16:31 +02:00
Stefanos Kornilios Mitsis Poiitidis
b322dcb3f6 RA: Spill any node that we can as a last resort 2021-01-16 17:15:35 +02:00
Stefanos Kornilios Mitsis Poiitidis
279a4f3c33 ConstProp: Allocate constants once per block 2021-01-16 17:11:46 +02:00
Stefanos Kornilios Mitsis Poiitidis
1fc9480988 Tests: Add delinking test 2021-01-16 13:24:37 +02:00
Stefanos Kornilios Mitsis Poiitidis
eb430815ad Jit: Add Block Linking information 2021-01-16 12:30:32 +02:00
Stefanos Kornilios Mitsis Poiitidis
265dfc5668
Merge pull request #658 from Sonicadvance1/kernel_check 
Adds kernel version check to FEXLoader
 2021-01-16 00:29:16 +02:00
Ryan Houdek
0e11dea46f Adds kernel version check to FEXLoader 
We require kernel 4.17 minimum on the host to run correctly
 2021-01-15 13:55:04 -08:00
Ryan Houdek
80dfa76d48 Have SyscallHandler calculate host kernel version 2021-01-15 13:44:08 -08:00