FEX/unittests/ASM/VEX/vpavgb_aliasing.asm
Lioncache 1f6c6345d9 VectorOps: Handle SVE VURAvg a little better
We can perform less moves by checking for scenarios where aliasing
occurs. Since addition is commutative (usually, general-case anyway),
order of inputs doesn't strictly matter here.
2023-10-19 12:14:12 +02:00

43 lines
825 B
NASM

%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM10": ["0x2179B0697D5378C4", "0x3B8E6EAE8C165248", "0x2179B0697D5378C4", "0x3B8E6EAE8C165248"],
"XMM11": ["0x1ED68638699D35CA", "0x5E2E7560AB7B5262", "0x1ED68638699D35CA", "0x5E2E7560AB7B5262"]
}
}
%endif
; Small test that ensures aliasing source/dest is handled properly.
lea rdx, [rel .data]
vmovapd ymm6, [rdx + 32]
vmovapd ymm7, [rdx]
; 256-bit register only
vmovapd ymm10, ymm7
vpavgb ymm10, ymm10, ymm6
vmovapd ymm11, [rdx + 64]
vpavgb ymm11, ymm7, ymm11
hlt
align 32
.data:
dq 0x2BB883523D4F3197
dq 0x1246C77764260189
dq 0x2BB883523D4F3197
dq 0x1246C77764260189
dq 0x163ADD80BC57BEF1
dq 0x64D615E5B405A306
dq 0x163ADD80BC57BEF1
dq 0x64D615E5B405A306
dq 0x11F4881D94EB39FC
dq 0xA9162248F2D0A23A
dq 0x11F4881D94EB39FC
dq 0xA9162248F2D0A23A