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4177d5c185
Makes the behavior consistent with the x86 JIT. We need to treat values larger than 31 as if they were 31 bit shifts in order to handle sign-extending behavior properly.
40 lines
928 B
NASM
40 lines
928 B
NASM
%ifdef CONFIG
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{
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"HostFeatures": ["AVX"],
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"RegData": {
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"XMM2": ["0xFF80000000007FFF", "0x00000000FFFFFFFF", "0x0400000000555555", "0xFFFFFFFF00000000"],
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"XMM3": ["0xFF80000000007FFF", "0x00000000FFFFFFFF", "0x0400000000555555", "0xFFFFFFFF00000000"],
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"XMM4": ["0xFF80000000007FFF", "0x00000000FFFFFFFF", "0x0000000000000000", "0x0000000000000000"],
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"XMM5": ["0xFF80000000007FFF", "0x00000000FFFFFFFF", "0x0000000000000000", "0x0000000000000000"]
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},
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"MemoryRegions": {
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"0x100000000": "4096"
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}
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}
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%endif
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lea rdx, [rel .data]
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vmovapd ymm0, [rdx + 32 * 0]
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vmovapd ymm1, [rdx + 32 * 1]
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vpsravd ymm2, ymm0, ymm1
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vpsravd ymm3, ymm0, [rdx + 32]
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vpsravd xmm4, xmm0, xmm1
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vpsravd xmm5, xmm0, [rdx + 32]
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hlt
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align 32
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.data:
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dq 0x800000007FFFFFFF
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dq 0x0FFFFFFFFFFFFFFF
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dq 0x4000000055555555
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dq 0xFFFFFFFF7FFFFFFF
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dq 0x0000000800000010
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dq 0x0000002000000020
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dq 0x0000000400000008
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dq 0xFFFFFFFFFFFFFFFF
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