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https://github.com/FEX-Emu/FEX.git
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44 lines
1.0 KiB
NASM
44 lines
1.0 KiB
NASM
%ifdef CONFIG
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{
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"RegData": {
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"RAX": "0x41424344",
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"RBX": "0x41424344",
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"RCX": "0x51525354"
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},
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"MemoryRegions": {
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"0x00fd0000": "4096",
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"0xf0000000": "4096"
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},
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"MemoryData": {
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"0xf0000000": "0x41424344",
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"0x00fd0000": "0x51525354"
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},
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"Mode": "32BIT"
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}
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%endif
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; Ensures that zero extension of addresses are adhered to.
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lea eax, [0xf000_0000]
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mov eax, [ds:eax]
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; Ensures that zext occurs correctly with two registers that have the sign bit set.
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mov ebx, 0xffff_ffff
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mov ecx, 0xf000_0001
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; Break the block so it can't optimize through.
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jmp .test
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.test:
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mov ebx, [ebx+ecx]
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; Ensures that zext occurs correctly with SIB indexing with second argument not having sign bit set but "index" having sign bit.
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; Originally saw in Metal Gear Rising Revengeance with a `jmp dword [ecx*4+0xfdbf10]` instruction.
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; With ecx = 0xfffffff4 = -12. This is them loading a switch table's branches just before the switch base.
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mov ecx, -12
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; Break the block so it can't optimize through.
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jmp .test2
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.test2:
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mov ecx, [ecx*4+0x00fd_0030]
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hlt
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