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36 lines
690 B
NASM
36 lines
690 B
NASM
%ifdef CONFIG
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{
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"RegData": {
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"XMM0": ["0x45464748", "0x0"],
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"XMM1": ["0x5152535455565758", "0x0"]
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},
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"MemoryRegions": {
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"0x100000000": "4096"
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}
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}
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%endif
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mov rdx, 0xe0000000
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mov rax, 0x4142434445464748
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mov [rdx + 8 * 0], rax
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mov rax, 0x5152535455565758
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mov [rdx + 8 * 1], rax
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mov rax, 0x6162636465666768
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mov [rdx + 8 * 2], rax
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mov rax, 0x7172737475767778
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mov [rdx + 8 * 3], rax
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mov rax, 0x0
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mov [rdx + 8 * 4], rax
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mov [rdx + 8 * 5], rax
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movaps xmm2, [rdx + 8 * 2]
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movaps xmm3, [rdx + 8 * 2]
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movd xmm0, dword [rdx + 8 * 0]
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; AMD's Architecture programmer's manual claims this mnemonic is still movd, but compilers only accept movq
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movq xmm1, qword [rdx + 8 * 1]
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hlt
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