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f056cc790e
This has a race condition with SIGPROF which the Tegra Orin hits consistently. Probably due to a faster timer or something?
46 lines
1.8 KiB
Plaintext
46 lines
1.8 KiB
Plaintext
# This has invalid asm generated for its test
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# 'foo' gets the argument in edi
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# Passes the argument to bar in eax
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# 'bar' accepts the argument in edi
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# inline asm is incorrect, needs to use =d and d on the value
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asm-5.c.gcc-target-test-64
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# Fails even on host device
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# 'test_pextrw' does a zero extend to the gpr
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# Which means its -3339 value turns in to 0xf2f5
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# While the 'compute_correct_result' value does a sign extension
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# Which turns the value in to 0xfffff2f5
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# This causes its comparison to fail
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sse2-mmx-pextrw.c.gcc-target-test-64
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# Uses AVX
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# Test is compiled with -march=native, which means the build machine had avx
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# Needs to be recompiled to care about it
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pr57275.c.gcc-target-test-64
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# Fails even on host device
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# Stores a large 64bit value in to a union of double and 'unsigned long long'
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# 'test' loads this value in to a x87 register, then stores that value on to the stack
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# Checks the flag and skips a bunch of x87 logic, and loads that value back from the stack in to rax
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# Value has been munged from the fld + fstp step
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# 0xFFF279535D540FE4 was the original value
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# 0xFFFA79535D540FE4 was the value it turned in to
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pr88240.c.gcc-target-test-64
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# This relies on SIGPROF which means we need real signal support to handle this
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# Crashes or hangs depending on which runner is running it
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mcount_pic.c.gcc-target-test-64
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# These tests fail because of things unrelated to the sse4.1 instructions
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sse4_1-ceil-sfix-vec.c.gcc-target-test-64
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sse4_1-ceilf-sfix-vec.c.gcc-target-test-64
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sse4_1-floor-sfix-vec.c.gcc-target-test-64
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sse4_1-floorf-sfix-vec.c.gcc-target-test-64
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sse4_1-rint-sfix-vec.c.gcc-target-test-64
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sse4_1-rintf-sfix-vec.c.gcc-target-test-64
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sse4_1-round-sfix-vec.c.gcc-target-test-64
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sse4_1-roundf-sfix-vec.c.gcc-target-test-64
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# This has a race with SIGPROF
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mcount_pic.c.gcc-target-test-64
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