FEX/unittests/ASM/VEX/vinsertf128.asm
2022-12-14 04:24:04 +00:00

44 lines
1.2 KiB
NASM

%ifdef CONFIG
{
"HostFeatures": ["AVX"],
"RegData": {
"XMM0": ["0x3FF0000000000000", "0xEEEEEEEEEEEEEEEE", "0xFFFFFFFFFFFFFFFF", "0xAAAAAAAAAAAAAAAA"],
"XMM1": ["0xBBBBBBBBBBBBBBBB", "0xDDDDDDDDDDDDDDDD", "0xCCCCCCCCCCCCCCCC", "0x9999999999999999"],
"XMM2": ["0x3FF0000000000000", "0xEEEEEEEEEEEEEEEE", "0xBBBBBBBBBBBBBBBB", "0xDDDDDDDDDDDDDDDD"],
"XMM3": ["0x3FF0000000000000", "0xEEEEEEEEEEEEEEEE", "0xBBBBBBBBBBBBBBBB", "0xDDDDDDDDDDDDDDDD"],
"XMM4": ["0xBBBBBBBBBBBBBBBB", "0xDDDDDDDDDDDDDDDD", "0xFFFFFFFFFFFFFFFF", "0xAAAAAAAAAAAAAAAA"],
"XMM5": ["0xBBBBBBBBBBBBBBBB", "0xDDDDDDDDDDDDDDDD", "0xFFFFFFFFFFFFFFFF", "0xAAAAAAAAAAAAAAAA"]
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
lea rdx, [rel .data]
vmovapd ymm0, [rdx]
vmovapd ymm1, [rdx + 32]
; Insert into upper lane
vinsertf128 ymm2, ymm0, xmm1, 1
vinsertf128 ymm3, ymm0, [rdx + 32], 1
; Insert into lower lane
vinsertf128 ymm4, ymm0, xmm1, 0
vinsertf128 ymm5, ymm0, [rdx + 32], 0
hlt
align 32
.data:
dq 0x3FF0000000000000
dq 0xEEEEEEEEEEEEEEEE
dq 0xFFFFFFFFFFFFFFFF
dq 0xAAAAAAAAAAAAAAAA
dq 0xBBBBBBBBBBBBBBBB
dq 0xDDDDDDDDDDDDDDDD
dq 0xCCCCCCCCCCCCCCCC
dq 0x9999999999999999