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https://github.com/FEX-Emu/FEX.git
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81 lines
2.5 KiB
NASM
81 lines
2.5 KiB
NASM
%ifdef CONFIG
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{
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"HostFeatures": ["AVX"],
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"RegData": {
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"XMM0": ["0x3F8000003F800000", "0x3F8000003F800000", "0x0000000000000000", "0x0000000000000000"],
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"XMM1": ["0x4080000040000000", "0x4080000040800000", "0x0000000000000000", "0x0000000000000000"],
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"XMM2": ["0x4110000040400000", "0x4110000041100000", "0x0000000000000000", "0x0000000000000000"],
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"XMM3": ["0x4180000040800000", "0x4180000041800000", "0x0000000000000000", "0x0000000000000000"],
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"XMM4": ["0x41C800003F800000", "0x41C8000041C80000", "0x0000000000000000", "0x0000000000000000"],
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"XMM5": ["0x4080000040000000", "0x4080000040800000", "0x0000000000000000", "0x0000000000000000"],
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"XMM6": ["0x4110000040400000", "0x4110000041100000", "0x0000000000000000", "0x0000000000000000"],
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"XMM7": ["0x4180000040800000", "0x4180000041800000", "0x0000000000000000", "0x0000000000000000"],
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"XMM8": ["0x418000003F800000", "0x4180000041800000", "0x0000000000000000", "0x0000000000000000"],
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"XMM9": ["0x41C8000040000000", "0x41C8000041C80000", "0x0000000000000000", "0x0000000000000000"],
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"XMM10": ["0x4080000040400000", "0x4080000040800000", "0x0000000000000000", "0x0000000000000000"],
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"XMM11": ["0x4110000040800000", "0x4110000041100000", "0x0000000000000000", "0x0000000000000000"]
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},
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"MemoryRegions": {
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"0x100000000": "4096"
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}
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}
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%endif
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lea rdx, [rel .data]
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vmovapd ymm0, [rdx + 32 * 0]
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vmovapd ymm1, [rdx + 32 * 1]
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vmovapd ymm2, [rdx + 32 * 2]
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vmovapd ymm3, [rdx + 32 * 3]
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vmovapd ymm4, [rdx + 32 * 4]
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vmovapd ymm5, [rdx + 32 * 1]
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vmovapd ymm6, [rdx + 32 * 2]
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vmovapd ymm7, [rdx + 32 * 3]
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; Register only
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vsqrtss xmm0, xmm0, xmm0
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vsqrtss xmm1, xmm1, xmm1
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vsqrtss xmm2, xmm2, xmm2
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vsqrtss xmm3, xmm3, xmm3
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; Memory operand
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vsqrtss xmm4, xmm4, [rdx + 32 * 0]
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vsqrtss xmm5, xmm5, [rdx + 32 * 1]
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vsqrtss xmm6, xmm6, [rdx + 32 * 2]
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vsqrtss xmm7, xmm7, [rdx + 32 * 3]
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; Merge different source register
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vsqrtss xmm8, xmm3, [rdx + 32 * 0]
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vsqrtss xmm9, xmm4, [rdx + 32 * 1]
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vsqrtss xmm10, xmm5, [rdx + 32 * 2]
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vsqrtss xmm11, xmm6, [rdx + 32 * 3]
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hlt
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align 32
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.data:
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dq 0x3F8000003F800000 ; 1.0
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dq 0x3F8000003F800000
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dq 0x3F8000003F800000
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dq 0x3F8000003F800000
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dq 0x4080000040800000 ; 4.0
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dq 0x4080000040800000
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dq 0x4080000040800000
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dq 0x4080000040800000
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dq 0x4110000041100000 ; 9.0
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dq 0x4110000041100000
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dq 0x4110000041100000
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dq 0x4110000041100000
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dq 0x4180000041800000 ; 16.0
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dq 0x4180000041800000
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dq 0x4180000041800000
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dq 0x4180000041800000
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dq 0x41C8000041C80000 ; 25.0
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dq 0x41C8000041C80000
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dq 0x41C8000041C80000
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dq 0x41C8000041C80000
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