2008-04-17 04:28:09 +00:00
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2007
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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* Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/kvm_host.h>
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <asm/cputable.h>
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#include <asm/uaccess.h>
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#include <asm/kvm_ppc.h>
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2008-11-05 15:36:13 +00:00
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#include <asm/cacheflush.h>
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2008-04-17 04:28:09 +00:00
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2008-11-05 15:36:16 +00:00
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#include "booke.h"
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2008-04-17 04:28:09 +00:00
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#include "44x_tlb.h"
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2008-11-05 15:36:13 +00:00
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unsigned long kvmppc_booke_handlers;
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2008-04-17 04:28:09 +00:00
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#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
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#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ "mmio", VCPU_STAT(mmio_exits) },
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{ "dcr", VCPU_STAT(dcr_exits) },
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{ "sig", VCPU_STAT(signal_exits) },
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{ "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
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{ "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
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{ "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
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{ "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
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{ "sysc", VCPU_STAT(syscall_exits) },
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{ "isi", VCPU_STAT(isi_exits) },
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{ "dsi", VCPU_STAT(dsi_exits) },
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{ "inst_emu", VCPU_STAT(emulated_inst_exits) },
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{ "dec", VCPU_STAT(dec_exits) },
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{ "ext_intr", VCPU_STAT(ext_intr_exits) },
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2008-04-25 22:55:49 +00:00
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{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
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2008-04-17 04:28:09 +00:00
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{ NULL }
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};
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static const u32 interrupt_msr_mask[16] = {
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[BOOKE_INTERRUPT_CRITICAL] = MSR_ME,
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[BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
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[BOOKE_INTERRUPT_DATA_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_INST_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_EXTERNAL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_ALIGNMENT] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_PROGRAM] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_FP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_SYSCALL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_AP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_DECREMENTER] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_FIT] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_WATCHDOG] = MSR_ME,
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[BOOKE_INTERRUPT_DTLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_ITLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_DEBUG] = MSR_ME,
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};
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const unsigned char exception_priority[] = {
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[BOOKE_INTERRUPT_DATA_STORAGE] = 0,
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[BOOKE_INTERRUPT_INST_STORAGE] = 1,
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[BOOKE_INTERRUPT_ALIGNMENT] = 2,
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[BOOKE_INTERRUPT_PROGRAM] = 3,
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[BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
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[BOOKE_INTERRUPT_SYSCALL] = 5,
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[BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
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[BOOKE_INTERRUPT_DTLB_MISS] = 7,
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[BOOKE_INTERRUPT_ITLB_MISS] = 8,
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[BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
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[BOOKE_INTERRUPT_DEBUG] = 10,
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[BOOKE_INTERRUPT_CRITICAL] = 11,
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[BOOKE_INTERRUPT_WATCHDOG] = 12,
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[BOOKE_INTERRUPT_EXTERNAL] = 13,
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[BOOKE_INTERRUPT_FIT] = 14,
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[BOOKE_INTERRUPT_DECREMENTER] = 15,
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};
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const unsigned char priority_exception[] = {
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BOOKE_INTERRUPT_DATA_STORAGE,
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BOOKE_INTERRUPT_INST_STORAGE,
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BOOKE_INTERRUPT_ALIGNMENT,
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BOOKE_INTERRUPT_PROGRAM,
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BOOKE_INTERRUPT_FP_UNAVAIL,
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BOOKE_INTERRUPT_SYSCALL,
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BOOKE_INTERRUPT_AP_UNAVAIL,
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BOOKE_INTERRUPT_DTLB_MISS,
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BOOKE_INTERRUPT_ITLB_MISS,
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BOOKE_INTERRUPT_MACHINE_CHECK,
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BOOKE_INTERRUPT_DEBUG,
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BOOKE_INTERRUPT_CRITICAL,
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BOOKE_INTERRUPT_WATCHDOG,
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BOOKE_INTERRUPT_EXTERNAL,
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BOOKE_INTERRUPT_FIT,
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BOOKE_INTERRUPT_DECREMENTER,
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};
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/* TODO: use vcpu_printf() */
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void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
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{
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int i;
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2008-11-05 15:36:19 +00:00
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printk("pc: %08lx msr: %08lx\n", vcpu->arch.pc, vcpu->arch.msr);
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printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
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printk("srr0: %08lx srr1: %08lx\n", vcpu->arch.srr0, vcpu->arch.srr1);
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2008-04-17 04:28:09 +00:00
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printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
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for (i = 0; i < 32; i += 4) {
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2008-11-05 15:36:19 +00:00
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printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
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2008-04-17 04:28:09 +00:00
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vcpu->arch.gpr[i],
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vcpu->arch.gpr[i+1],
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vcpu->arch.gpr[i+2],
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vcpu->arch.gpr[i+3]);
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}
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}
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2008-11-05 15:36:14 +00:00
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static void kvmppc_booke_queue_exception(struct kvm_vcpu *vcpu, int exception)
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{
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unsigned int priority = exception_priority[exception];
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set_bit(priority, &vcpu->arch.pending_exceptions);
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}
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static void kvmppc_booke_clear_exception(struct kvm_vcpu *vcpu, int exception)
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{
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unsigned int priority = exception_priority[exception];
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clear_bit(priority, &vcpu->arch.pending_exceptions);
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}
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void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
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{
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kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
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}
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void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_DECREMENTER);
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}
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int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
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{
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unsigned int priority = exception_priority[BOOKE_INTERRUPT_DECREMENTER];
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return test_bit(priority, &vcpu->arch.pending_exceptions);
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}
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void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
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struct kvm_interrupt *irq)
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{
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kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_EXTERNAL);
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}
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2008-04-17 04:28:09 +00:00
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/* Check if we are ready to deliver the interrupt */
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static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
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{
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int r;
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switch (interrupt) {
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case BOOKE_INTERRUPT_CRITICAL:
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r = vcpu->arch.msr & MSR_CE;
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break;
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case BOOKE_INTERRUPT_MACHINE_CHECK:
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r = vcpu->arch.msr & MSR_ME;
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break;
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case BOOKE_INTERRUPT_EXTERNAL:
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r = vcpu->arch.msr & MSR_EE;
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break;
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case BOOKE_INTERRUPT_DECREMENTER:
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r = vcpu->arch.msr & MSR_EE;
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break;
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case BOOKE_INTERRUPT_FIT:
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r = vcpu->arch.msr & MSR_EE;
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break;
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case BOOKE_INTERRUPT_WATCHDOG:
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r = vcpu->arch.msr & MSR_CE;
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break;
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case BOOKE_INTERRUPT_DEBUG:
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r = vcpu->arch.msr & MSR_DE;
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break;
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default:
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r = 1;
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}
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return r;
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}
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2008-11-05 15:36:14 +00:00
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static void kvmppc_booke_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
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2008-04-17 04:28:09 +00:00
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{
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switch (interrupt) {
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case BOOKE_INTERRUPT_DECREMENTER:
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vcpu->arch.tsr |= TSR_DIS;
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break;
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}
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vcpu->arch.srr0 = vcpu->arch.pc;
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vcpu->arch.srr1 = vcpu->arch.msr;
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vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
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kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
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}
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/* Check pending exceptions and deliver one, if possible. */
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2008-11-05 15:36:14 +00:00
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void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
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2008-04-17 04:28:09 +00:00
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{
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unsigned long *pending = &vcpu->arch.pending_exceptions;
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unsigned int exception;
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unsigned int priority;
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priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
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while (priority <= BOOKE_MAX_INTERRUPT) {
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exception = priority_exception[priority];
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if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
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2008-11-05 15:36:14 +00:00
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kvmppc_booke_clear_exception(vcpu, exception);
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kvmppc_booke_deliver_interrupt(vcpu, exception);
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2008-04-17 04:28:09 +00:00
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break;
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}
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priority = find_next_bit(pending,
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BITS_PER_BYTE * sizeof(*pending),
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priority + 1);
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}
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}
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/**
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* kvmppc_handle_exit
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*
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* Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
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*/
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int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int exit_nr)
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{
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enum emulation_result er;
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int r = RESUME_HOST;
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local_irq_enable();
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run->exit_reason = KVM_EXIT_UNKNOWN;
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run->ready_for_interrupt_injection = 1;
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switch (exit_nr) {
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case BOOKE_INTERRUPT_MACHINE_CHECK:
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printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
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kvmppc_dump_vcpu(vcpu);
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r = RESUME_HOST;
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break;
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case BOOKE_INTERRUPT_EXTERNAL:
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2008-11-05 15:36:21 +00:00
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vcpu->stat.ext_intr_exits++;
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if (need_resched())
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cond_resched();
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r = RESUME_GUEST;
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break;
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2008-04-17 04:28:09 +00:00
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case BOOKE_INTERRUPT_DECREMENTER:
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/* Since we switched IVPR back to the host's value, the host
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* handled this interrupt the moment we enabled interrupts.
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* Now we just offer it a chance to reschedule the guest. */
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/* XXX At this point the TLB still holds our shadow TLB, so if
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* we do reschedule the host will fault over it. Perhaps we
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* should politely restore the host's entries to minimize
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* misses before ceding control. */
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2008-11-05 15:36:21 +00:00
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vcpu->stat.dec_exits++;
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2008-04-17 04:28:09 +00:00
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if (need_resched())
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cond_resched();
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r = RESUME_GUEST;
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break;
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case BOOKE_INTERRUPT_PROGRAM:
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if (vcpu->arch.msr & MSR_PR) {
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/* Program traps generated by user-level software must be handled
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* by the guest kernel. */
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vcpu->arch.esr = vcpu->arch.fault_esr;
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2008-11-05 15:36:14 +00:00
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kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
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2008-04-17 04:28:09 +00:00
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r = RESUME_GUEST;
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break;
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}
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er = kvmppc_emulate_instruction(run, vcpu);
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switch (er) {
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case EMULATE_DONE:
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/* Future optimization: only reload non-volatiles if
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* they were actually modified by emulation. */
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vcpu->stat.emulated_inst_exits++;
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r = RESUME_GUEST_NV;
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break;
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case EMULATE_DO_DCR:
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run->exit_reason = KVM_EXIT_DCR;
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2008-11-05 15:36:21 +00:00
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vcpu->stat.dcr_exits++;
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2008-04-17 04:28:09 +00:00
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r = RESUME_HOST;
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break;
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case EMULATE_FAIL:
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/* XXX Deliver Program interrupt to guest. */
|
2008-11-05 15:36:19 +00:00
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printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
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2008-04-17 04:28:09 +00:00
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__func__, vcpu->arch.pc, vcpu->arch.last_inst);
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|
|
/* For debugging, encode the failing instruction and
|
|
|
|
* report it to userspace. */
|
|
|
|
run->hw.hardware_exit_reason = ~0ULL << 32;
|
|
|
|
run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
|
|
|
|
r = RESUME_HOST;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2008-04-29 16:18:23 +00:00
|
|
|
case BOOKE_INTERRUPT_FP_UNAVAIL:
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
2008-04-29 16:18:23 +00:00
|
|
|
r = RESUME_GUEST;
|
|
|
|
break;
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
case BOOKE_INTERRUPT_DATA_STORAGE:
|
|
|
|
vcpu->arch.dear = vcpu->arch.fault_dear;
|
|
|
|
vcpu->arch.esr = vcpu->arch.fault_esr;
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
2008-04-17 04:28:09 +00:00
|
|
|
vcpu->stat.dsi_exits++;
|
|
|
|
r = RESUME_GUEST;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BOOKE_INTERRUPT_INST_STORAGE:
|
|
|
|
vcpu->arch.esr = vcpu->arch.fault_esr;
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
2008-04-17 04:28:09 +00:00
|
|
|
vcpu->stat.isi_exits++;
|
|
|
|
r = RESUME_GUEST;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BOOKE_INTERRUPT_SYSCALL:
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
2008-04-17 04:28:09 +00:00
|
|
|
vcpu->stat.syscall_exits++;
|
|
|
|
r = RESUME_GUEST;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BOOKE_INTERRUPT_DTLB_MISS: {
|
2008-11-05 15:36:12 +00:00
|
|
|
struct kvmppc_44x_tlbe *gtlbe;
|
2008-04-17 04:28:09 +00:00
|
|
|
unsigned long eaddr = vcpu->arch.fault_dear;
|
|
|
|
gfn_t gfn;
|
|
|
|
|
|
|
|
/* Check the guest TLB. */
|
|
|
|
gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
|
|
|
|
if (!gtlbe) {
|
|
|
|
/* The guest didn't have a mapping for it. */
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
2008-04-17 04:28:09 +00:00
|
|
|
vcpu->arch.dear = vcpu->arch.fault_dear;
|
|
|
|
vcpu->arch.esr = vcpu->arch.fault_esr;
|
|
|
|
vcpu->stat.dtlb_real_miss_exits++;
|
|
|
|
r = RESUME_GUEST;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
|
|
|
|
gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
|
|
|
|
|
|
|
|
if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
|
|
|
|
/* The guest TLB had a mapping, but the shadow TLB
|
|
|
|
* didn't, and it is RAM. This could be because:
|
|
|
|
* a) the entry is mapping the host kernel, or
|
|
|
|
* b) the guest used a large mapping which we're faking
|
|
|
|
* Either way, we need to satisfy the fault without
|
|
|
|
* invoking the guest. */
|
|
|
|
kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
|
|
|
|
gtlbe->word2);
|
|
|
|
vcpu->stat.dtlb_virt_miss_exits++;
|
|
|
|
r = RESUME_GUEST;
|
|
|
|
} else {
|
|
|
|
/* Guest has mapped and accessed a page which is not
|
|
|
|
* actually RAM. */
|
|
|
|
r = kvmppc_emulate_mmio(run, vcpu);
|
2008-11-05 15:36:21 +00:00
|
|
|
vcpu->stat.mmio_exits++;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case BOOKE_INTERRUPT_ITLB_MISS: {
|
2008-11-05 15:36:12 +00:00
|
|
|
struct kvmppc_44x_tlbe *gtlbe;
|
2008-04-17 04:28:09 +00:00
|
|
|
unsigned long eaddr = vcpu->arch.pc;
|
|
|
|
gfn_t gfn;
|
|
|
|
|
|
|
|
r = RESUME_GUEST;
|
|
|
|
|
|
|
|
/* Check the guest TLB. */
|
|
|
|
gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
|
|
|
|
if (!gtlbe) {
|
|
|
|
/* The guest didn't have a mapping for it. */
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
2008-04-17 04:28:09 +00:00
|
|
|
vcpu->stat.itlb_real_miss_exits++;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
vcpu->stat.itlb_virt_miss_exits++;
|
|
|
|
|
|
|
|
gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
|
|
|
|
|
|
|
|
if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
|
|
|
|
/* The guest TLB had a mapping, but the shadow TLB
|
|
|
|
* didn't. This could be because:
|
|
|
|
* a) the entry is mapping the host kernel, or
|
|
|
|
* b) the guest used a large mapping which we're faking
|
|
|
|
* Either way, we need to satisfy the fault without
|
|
|
|
* invoking the guest. */
|
|
|
|
kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
|
|
|
|
gtlbe->word2);
|
|
|
|
} else {
|
|
|
|
/* Guest mapped and leaped at non-RAM! */
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_MACHINE_CHECK);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2008-07-25 18:54:49 +00:00
|
|
|
case BOOKE_INTERRUPT_DEBUG: {
|
|
|
|
u32 dbsr;
|
|
|
|
|
|
|
|
vcpu->arch.pc = mfspr(SPRN_CSRR0);
|
|
|
|
|
|
|
|
/* clear IAC events in DBSR register */
|
|
|
|
dbsr = mfspr(SPRN_DBSR);
|
|
|
|
dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
|
|
|
|
mtspr(SPRN_DBSR, dbsr);
|
|
|
|
|
|
|
|
run->exit_reason = KVM_EXIT_DEBUG;
|
|
|
|
r = RESUME_HOST;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
default:
|
|
|
|
printk(KERN_EMERG "exit_nr %d\n", exit_nr);
|
|
|
|
BUG();
|
|
|
|
}
|
|
|
|
|
|
|
|
local_irq_disable();
|
|
|
|
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_core_deliver_interrupts(vcpu);
|
2008-04-17 04:28:09 +00:00
|
|
|
|
|
|
|
if (!(r & RESUME_HOST)) {
|
|
|
|
/* To avoid clobbering exit_reason, only check for signals if
|
|
|
|
* we aren't already exiting to userspace for some other
|
|
|
|
* reason. */
|
|
|
|
if (signal_pending(current)) {
|
|
|
|
run->exit_reason = KVM_EXIT_INTR;
|
|
|
|
r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
|
|
|
|
vcpu->stat.signal_exits++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
|
|
|
|
int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
vcpu->arch.pc = 0;
|
|
|
|
vcpu->arch.msr = 0;
|
|
|
|
vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
|
|
|
|
|
2008-07-25 18:54:53 +00:00
|
|
|
vcpu->arch.shadow_pid = 1;
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
/* Eye-catching number so we know if the guest takes an interrupt
|
|
|
|
* before it's programmed its own IVPR. */
|
|
|
|
vcpu->arch.ivpr = 0x55550000;
|
|
|
|
|
2008-11-05 15:36:17 +00:00
|
|
|
return kvmppc_core_vcpu_setup(vcpu);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
regs->pc = vcpu->arch.pc;
|
|
|
|
regs->cr = vcpu->arch.cr;
|
|
|
|
regs->ctr = vcpu->arch.ctr;
|
|
|
|
regs->lr = vcpu->arch.lr;
|
|
|
|
regs->xer = vcpu->arch.xer;
|
|
|
|
regs->msr = vcpu->arch.msr;
|
|
|
|
regs->srr0 = vcpu->arch.srr0;
|
|
|
|
regs->srr1 = vcpu->arch.srr1;
|
|
|
|
regs->pid = vcpu->arch.pid;
|
|
|
|
regs->sprg0 = vcpu->arch.sprg0;
|
|
|
|
regs->sprg1 = vcpu->arch.sprg1;
|
|
|
|
regs->sprg2 = vcpu->arch.sprg2;
|
|
|
|
regs->sprg3 = vcpu->arch.sprg3;
|
|
|
|
regs->sprg5 = vcpu->arch.sprg4;
|
|
|
|
regs->sprg6 = vcpu->arch.sprg5;
|
|
|
|
regs->sprg7 = vcpu->arch.sprg6;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
|
|
|
regs->gpr[i] = vcpu->arch.gpr[i];
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
vcpu->arch.pc = regs->pc;
|
|
|
|
vcpu->arch.cr = regs->cr;
|
|
|
|
vcpu->arch.ctr = regs->ctr;
|
|
|
|
vcpu->arch.lr = regs->lr;
|
|
|
|
vcpu->arch.xer = regs->xer;
|
2008-11-05 15:36:20 +00:00
|
|
|
kvmppc_set_msr(vcpu, regs->msr);
|
2008-04-17 04:28:09 +00:00
|
|
|
vcpu->arch.srr0 = regs->srr0;
|
|
|
|
vcpu->arch.srr1 = regs->srr1;
|
|
|
|
vcpu->arch.sprg0 = regs->sprg0;
|
|
|
|
vcpu->arch.sprg1 = regs->sprg1;
|
|
|
|
vcpu->arch.sprg2 = regs->sprg2;
|
|
|
|
vcpu->arch.sprg3 = regs->sprg3;
|
|
|
|
vcpu->arch.sprg5 = regs->sprg4;
|
|
|
|
vcpu->arch.sprg6 = regs->sprg5;
|
|
|
|
vcpu->arch.sprg7 = regs->sprg6;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
|
|
|
|
vcpu->arch.gpr[i] = regs->gpr[i];
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_sregs *sregs)
|
|
|
|
{
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_sregs *sregs)
|
|
|
|
{
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
|
|
{
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
|
|
{
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_translation *tr)
|
|
|
|
{
|
2008-11-05 15:36:17 +00:00
|
|
|
return kvmppc_core_vcpu_translate(vcpu, tr);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
2008-11-05 15:36:13 +00:00
|
|
|
|
2008-11-05 15:36:18 +00:00
|
|
|
int kvmppc_booke_init(void)
|
2008-11-05 15:36:13 +00:00
|
|
|
{
|
|
|
|
unsigned long ivor[16];
|
|
|
|
unsigned long max_ivor = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* We install our own exception handlers by hijacking IVPR. IVPR must
|
|
|
|
* be 16-bit aligned, so we need a 64KB allocation. */
|
|
|
|
kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
|
|
|
|
VCPU_SIZE_ORDER);
|
|
|
|
if (!kvmppc_booke_handlers)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/* XXX make sure our handlers are smaller than Linux's */
|
|
|
|
|
|
|
|
/* Copy our interrupt handlers to match host IVORs. That way we don't
|
|
|
|
* have to swap the IVORs on every guest/host transition. */
|
|
|
|
ivor[0] = mfspr(SPRN_IVOR0);
|
|
|
|
ivor[1] = mfspr(SPRN_IVOR1);
|
|
|
|
ivor[2] = mfspr(SPRN_IVOR2);
|
|
|
|
ivor[3] = mfspr(SPRN_IVOR3);
|
|
|
|
ivor[4] = mfspr(SPRN_IVOR4);
|
|
|
|
ivor[5] = mfspr(SPRN_IVOR5);
|
|
|
|
ivor[6] = mfspr(SPRN_IVOR6);
|
|
|
|
ivor[7] = mfspr(SPRN_IVOR7);
|
|
|
|
ivor[8] = mfspr(SPRN_IVOR8);
|
|
|
|
ivor[9] = mfspr(SPRN_IVOR9);
|
|
|
|
ivor[10] = mfspr(SPRN_IVOR10);
|
|
|
|
ivor[11] = mfspr(SPRN_IVOR11);
|
|
|
|
ivor[12] = mfspr(SPRN_IVOR12);
|
|
|
|
ivor[13] = mfspr(SPRN_IVOR13);
|
|
|
|
ivor[14] = mfspr(SPRN_IVOR14);
|
|
|
|
ivor[15] = mfspr(SPRN_IVOR15);
|
|
|
|
|
|
|
|
for (i = 0; i < 16; i++) {
|
|
|
|
if (ivor[i] > max_ivor)
|
|
|
|
max_ivor = ivor[i];
|
|
|
|
|
|
|
|
memcpy((void *)kvmppc_booke_handlers + ivor[i],
|
|
|
|
kvmppc_handlers_start + i * kvmppc_handler_len,
|
|
|
|
kvmppc_handler_len);
|
|
|
|
}
|
|
|
|
flush_icache_range(kvmppc_booke_handlers,
|
|
|
|
kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
|
|
|
|
|
2008-11-05 15:36:18 +00:00
|
|
|
return 0;
|
2008-11-05 15:36:13 +00:00
|
|
|
}
|
|
|
|
|
2008-11-05 15:36:18 +00:00
|
|
|
void __exit kvmppc_booke_exit(void)
|
2008-11-05 15:36:13 +00:00
|
|
|
{
|
|
|
|
free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
|
|
|
|
kvm_exit();
|
|
|
|
}
|