2008-11-12 14:38:39 +00:00
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/*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__
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#define __ASM_ARCH_MXC_BOARD_MX31PDK_H__
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2009-05-17 18:18:08 +00:00
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/* Definitions for components on the Debug board */
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/* Base address of CPLD controller on the Debug board */
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#define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(CS5_BASE_ADDR)
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/* LAN9217 ethernet base address */
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#define LAN9217_BASE_ADDR CS5_BASE_ADDR
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/* CPLD config and interrupt base address */
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#define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000)
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/* LED switchs */
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#define CPLD_LED_REG (CPLD_ADDR + 0x00)
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/* buttons */
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#define CPLD_SWITCH_BUTTONS_REG (EXPIO_ADDR + 0x08)
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/* status, interrupt */
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#define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10)
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#define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38)
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#define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20)
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/* magic word for debug CPLD */
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#define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40)
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#define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48)
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/* CPLD code version */
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#define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50)
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/* magic word for debug CPLD */
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#define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58)
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/* module reset register */
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#define CPLD_MODULE_RESET_REG (CPLD_ADDR + 0x60)
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/* CPU ID and Personality ID */
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#define CPLD_MCU_BOARD_ID_REG (CPLD_ADDR + 0x68)
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/* CPLD IRQ line for external uart, external ethernet etc */
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#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
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#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
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#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
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#define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0)
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#define EXPIO_INT_XUART_A (MXC_EXP_IO_BASE + 1)
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#define EXPIO_INT_XUART_B (MXC_EXP_IO_BASE + 2)
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#define EXPIO_INT_BUTTON_A (MXC_EXP_IO_BASE + 3)
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#define EXPIO_INT_BUTTON_B (MXC_EXP_IO_BASE + 4)
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#define MXC_MAX_EXP_IO_LINES 16
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2008-11-12 14:38:39 +00:00
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#endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */
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