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91 lines
2.2 KiB
C
91 lines
2.2 KiB
C
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/* linux/include/asm-arm/arch-s3c2410/system.h
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*
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* (c) 2003 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - System function defines and includes
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 12-May-2003 BJD Created file
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* 14-May-2003 BJD Removed idle to aid debugging
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* 12-Jun-2003 BJD Added reset via watchdog
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* 04-Sep-2003 BJD Moved to v2.6
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* 28-Oct-2004 BJD Added over-ride for idle, and fixed reset panic()
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*/
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/arch/map.h>
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#include <asm/arch/idle.h>
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#include <asm/arch/regs-watchdog.h>
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#include <asm/arch/regs-clock.h>
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void (*s3c24xx_idle)(void);
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void s3c24xx_default_idle(void)
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{
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void __iomem *reg = S3C2410_CLKCON;
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unsigned long tmp;
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int i;
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/* idle the system by using the idle mode which will wait for an
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* interrupt to happen before restarting the system.
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*/
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/* Warning: going into idle state upsets jtag scanning */
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__raw_writel(__raw_readl(reg) | (1<<2), reg);
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/* the samsung port seems to do a loop and then unset idle.. */
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for (i = 0; i < 50; i++) {
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tmp += __raw_readl(reg); /* ensure loop not optimised out */
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}
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/* this bit is not cleared on re-start... */
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__raw_writel(__raw_readl(reg) & ~(1<<2), reg);
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}
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static void arch_idle(void)
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{
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if (s3c24xx_idle != NULL)
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(s3c24xx_idle)();
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else
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s3c24xx_default_idle();
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}
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static void
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arch_reset(char mode)
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{
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if (mode == 's') {
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cpu_reset(0);
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}
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printk("arch_reset: attempting watchdog reset\n");
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__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
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/* put initial values into count and data */
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__raw_writel(0x100, S3C2410_WTCNT);
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__raw_writel(0x100, S3C2410_WTDAT);
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/* set the watchdog to go and reset... */
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__raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
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S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
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/* wait for reset to assert... */
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mdelay(5000);
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printk(KERN_ERR "Watchdog reset failed to assert reset\n");
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/* we'll take a jump through zero as a poor second */
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cpu_reset(0);
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}
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