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https://github.com/FEX-Emu/linux.git
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272 lines
6.1 KiB
C
272 lines
6.1 KiB
C
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/*
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* ppi.c Analog Devices Parallel Peripheral Interface driver
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*
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* Copyright (c) 2011 Analog Devices Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/slab.h>
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#include <asm/bfin_ppi.h>
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#include <asm/blackfin.h>
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#include <asm/cacheflush.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#include <media/blackfin/ppi.h>
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static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
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static void ppi_detach_irq(struct ppi_if *ppi);
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static int ppi_start(struct ppi_if *ppi);
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static int ppi_stop(struct ppi_if *ppi);
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static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
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static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
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static const struct ppi_ops ppi_ops = {
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.attach_irq = ppi_attach_irq,
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.detach_irq = ppi_detach_irq,
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.start = ppi_start,
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.stop = ppi_stop,
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.set_params = ppi_set_params,
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.update_addr = ppi_update_addr,
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};
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static irqreturn_t ppi_irq_err(int irq, void *dev_id)
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{
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struct ppi_if *ppi = dev_id;
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const struct ppi_info *info = ppi->info;
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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unsigned short status;
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/* register on bf561 is cleared when read
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* others are W1C
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*/
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status = bfin_read16(®->status);
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bfin_write16(®->status, 0xff00);
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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bfin_write16(®->status, 0xffff);
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break;
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}
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default:
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break;
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}
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return IRQ_HANDLED;
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}
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static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
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{
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const struct ppi_info *info = ppi->info;
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int ret;
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ret = request_dma(info->dma_ch, "PPI_DMA");
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if (ret) {
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pr_err("Unable to allocate DMA channel for PPI\n");
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return ret;
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}
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set_dma_callback(info->dma_ch, handler, ppi);
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if (ppi->err_int) {
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ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
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if (ret) {
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pr_err("Unable to allocate IRQ for PPI\n");
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free_dma(info->dma_ch);
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}
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}
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return ret;
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}
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static void ppi_detach_irq(struct ppi_if *ppi)
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{
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const struct ppi_info *info = ppi->info;
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if (ppi->err_int)
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free_irq(info->irq_err, ppi);
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free_dma(info->dma_ch);
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}
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static int ppi_start(struct ppi_if *ppi)
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{
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const struct ppi_info *info = ppi->info;
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/* enable DMA */
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enable_dma(info->dma_ch);
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/* enable PPI */
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ppi->ppi_control |= PORT_EN;
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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bfin_write16(®->control, ppi->ppi_control);
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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bfin_write32(®->control, ppi->ppi_control);
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break;
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}
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default:
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return -EINVAL;
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}
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SSYNC();
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return 0;
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}
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static int ppi_stop(struct ppi_if *ppi)
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{
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const struct ppi_info *info = ppi->info;
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/* disable PPI */
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ppi->ppi_control &= ~PORT_EN;
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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bfin_write16(®->control, ppi->ppi_control);
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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bfin_write32(®->control, ppi->ppi_control);
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break;
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}
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default:
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return -EINVAL;
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}
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/* disable DMA */
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clear_dma_irqstat(info->dma_ch);
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disable_dma(info->dma_ch);
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SSYNC();
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return 0;
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}
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static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
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{
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const struct ppi_info *info = ppi->info;
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int dma32 = 0;
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int dma_config, bytes_per_line, lines_per_frame;
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bytes_per_line = params->width * params->bpp / 8;
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lines_per_frame = params->height;
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if (params->int_mask == 0xFFFFFFFF)
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ppi->err_int = false;
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else
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ppi->err_int = true;
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dma_config = (DMA_FLOW_STOP | WNR | RESTART | DMA2D | DI_EN);
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ppi->ppi_control = params->ppi_control & ~PORT_EN;
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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if (params->ppi_control & DMA32)
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dma32 = 1;
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bfin_write16(®->control, ppi->ppi_control);
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bfin_write16(®->count, bytes_per_line - 1);
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bfin_write16(®->frame, lines_per_frame);
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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if ((params->ppi_control & PACK_EN)
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|| (params->ppi_control & 0x38000) > DLEN_16)
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dma32 = 1;
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bfin_write32(®->control, ppi->ppi_control);
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bfin_write16(®->line, bytes_per_line + params->blank_clocks);
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bfin_write16(®->frame, lines_per_frame);
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bfin_write16(®->hdelay, 0);
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bfin_write16(®->vdelay, 0);
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bfin_write16(®->hcount, bytes_per_line);
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bfin_write16(®->vcount, lines_per_frame);
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break;
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}
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default:
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return -EINVAL;
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}
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if (dma32) {
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dma_config |= WDSIZE_32;
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set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
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set_dma_x_modify(info->dma_ch, 4);
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set_dma_y_modify(info->dma_ch, 4);
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} else {
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dma_config |= WDSIZE_16;
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set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
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set_dma_x_modify(info->dma_ch, 2);
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set_dma_y_modify(info->dma_ch, 2);
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}
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set_dma_y_count(info->dma_ch, lines_per_frame);
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set_dma_config(info->dma_ch, dma_config);
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SSYNC();
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return 0;
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}
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static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
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{
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set_dma_start_addr(ppi->info->dma_ch, addr);
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}
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struct ppi_if *ppi_create_instance(const struct ppi_info *info)
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{
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struct ppi_if *ppi;
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if (!info || !info->pin_req)
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return NULL;
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if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
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pr_err("request peripheral failed\n");
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return NULL;
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}
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ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
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if (!ppi) {
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peripheral_free_list(info->pin_req);
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pr_err("unable to allocate memory for ppi handle\n");
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return NULL;
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}
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ppi->ops = &ppi_ops;
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ppi->info = info;
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pr_info("ppi probe success\n");
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return ppi;
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}
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void ppi_delete_instance(struct ppi_if *ppi)
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{
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peripheral_free_list(ppi->info->pin_req);
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kfree(ppi);
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}
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