2008-04-17 04:28:09 +00:00
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2007
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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* Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/kvm_host.h>
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#include <linux/vmalloc.h>
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2009-11-02 12:02:31 +00:00
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#include <linux/hrtimer.h>
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2008-04-17 04:28:09 +00:00
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#include <linux/fs.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2008-04-17 04:28:09 +00:00
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#include <asm/cputable.h>
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#include <asm/uaccess.h>
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#include <asm/kvm_ppc.h>
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2008-07-25 18:54:52 +00:00
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#include <asm/tlbflush.h>
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KVM: PPC: Allow book3s_hv guests to use SMT processor modes
This lifts the restriction that book3s_hv guests can only run one
hardware thread per core, and allows them to use up to 4 threads
per core on POWER7. The host still has to run single-threaded.
This capability is advertised to qemu through a new KVM_CAP_PPC_SMT
capability. The return value of the ioctl querying this capability
is the number of vcpus per virtual CPU core (vcore), currently 4.
To use this, the host kernel should be booted with all threads
active, and then all the secondary threads should be offlined.
This will put the secondary threads into nap mode. KVM will then
wake them from nap mode and use them for running guest code (while
they are still offline). To wake the secondary threads, we send
them an IPI using a new xics_wake_cpu() function, implemented in
arch/powerpc/sysdev/xics/icp-native.c. In other words, at this stage
we assume that the platform has a XICS interrupt controller and
we are using icp-native.c to drive it. Since the woken thread will
need to acknowledge and clear the IPI, we also export the base
physical address of the XICS registers using kvmppc_set_xics_phys()
for use in the low-level KVM book3s code.
When a vcpu is created, it is assigned to a virtual CPU core.
The vcore number is obtained by dividing the vcpu number by the
number of threads per core in the host. This number is exported
to userspace via the KVM_CAP_PPC_SMT capability. If qemu wishes
to run the guest in single-threaded mode, it should make all vcpu
numbers be multiples of the number of threads per core.
We distinguish three states of a vcpu: runnable (i.e., ready to execute
the guest), blocked (that is, idle), and busy in host. We currently
implement a policy that the vcore can run only when all its threads
are runnable or blocked. This way, if a vcpu needs to execute elsewhere
in the kernel or in qemu, it can do so without being starved of CPU
by the other vcpus.
When a vcore starts to run, it executes in the context of one of the
vcpu threads. The other vcpu threads all go to sleep and stay asleep
until something happens requiring the vcpu thread to return to qemu,
or to wake up to run the vcore (this can happen when another vcpu
thread goes from busy in host state to blocked).
It can happen that a vcpu goes from blocked to runnable state (e.g.
because of an interrupt), and the vcore it belongs to is already
running. In that case it can start to run immediately as long as
the none of the vcpus in the vcore have started to exit the guest.
We send the next free thread in the vcore an IPI to get it to start
to execute the guest. It synchronizes with the other threads via
the vcore->entry_exit_count field to make sure that it doesn't go
into the guest if the other vcpus are exiting by the time that it
is ready to actually enter the guest.
Note that there is no fixed relationship between the hardware thread
number and the vcpu number. Hardware threads are assigned to vcpus
as they become runnable, so we will always use the lower-numbered
hardware threads in preference to higher-numbered threads if not all
the vcpus in the vcore are runnable, regardless of which vcpus are
runnable.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:23:08 +00:00
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#include <asm/cputhreads.h>
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2008-12-02 21:51:57 +00:00
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#include "timing.h"
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2008-12-23 03:57:26 +00:00
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#include "../mm/mmu_decl.h"
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2008-04-17 04:28:09 +00:00
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2009-06-18 14:47:27 +00:00
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#define CREATE_TRACE_POINTS
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#include "trace.h"
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2008-04-17 04:28:09 +00:00
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int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
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{
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2010-07-29 12:47:43 +00:00
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return !(v->arch.shared->msr & MSR_WE) ||
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2011-11-17 12:39:59 +00:00
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!!(v->arch.pending_exceptions) ||
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v->requests;
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2008-04-17 04:28:09 +00:00
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}
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2012-03-08 21:44:24 +00:00
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int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
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{
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return 1;
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}
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2010-07-29 12:47:48 +00:00
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int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
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{
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int nr = kvmppc_get_gpr(vcpu, 11);
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int r;
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unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
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unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
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unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
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unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
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unsigned long r2 = 0;
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if (!(vcpu->arch.shared->msr & MSR_SF)) {
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/* 32 bit mode */
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param1 &= 0xffffffff;
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param2 &= 0xffffffff;
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param3 &= 0xffffffff;
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param4 &= 0xffffffff;
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}
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switch (nr) {
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2010-07-29 12:47:55 +00:00
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case HC_VENDOR_KVM | KVM_HC_PPC_MAP_MAGIC_PAGE:
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{
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vcpu->arch.magic_page_pa = param1;
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vcpu->arch.magic_page_ea = param2;
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KVM: PPC: Paravirtualize SPRG4-7, ESR, PIR, MASn
This allows additional registers to be accessed by the guest
in PR-mode KVM without trapping.
SPRG4-7 are readable from userspace. On booke, KVM will sync
these registers when it enters the guest, so that accesses from
guest userspace will work. The guest kernel, OTOH, must consistently
use either the real registers or the shared area between exits. This
also applies to the already-paravirted SPRG3.
On non-booke, it's not clear to what extent SPRG4-7 are supported
(they're not architected for book3s, but exist on at least some classic
chips). They are copied in the get/set regs ioctls, but I do not see any
non-booke emulation. I also do not see any syncing with real registers
(in PR-mode) including the user-readable SPRG3. This patch should not
make that situation any worse.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-11-09 00:23:30 +00:00
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r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
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2010-08-03 09:32:56 +00:00
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2010-07-29 12:47:55 +00:00
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r = HC_EV_SUCCESS;
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break;
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}
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2010-07-29 12:47:48 +00:00
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case HC_VENDOR_KVM | KVM_HC_FEATURES:
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r = HC_EV_SUCCESS;
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2012-02-15 23:40:00 +00:00
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#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
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2011-06-14 23:34:41 +00:00
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/* XXX Missing magic page on 44x */
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2010-07-29 12:47:55 +00:00
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r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
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#endif
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2010-07-29 12:47:48 +00:00
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/* Second return value is in r4 */
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break;
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default:
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r = HC_EV_UNIMPLEMENTED;
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break;
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}
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2010-08-03 09:32:56 +00:00
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kvmppc_set_gpr(vcpu, 4, r2);
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2010-07-29 12:47:48 +00:00
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return r;
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}
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2008-04-17 04:28:09 +00:00
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2011-08-10 11:57:08 +00:00
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int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
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{
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int r = false;
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/* We have to know what CPU to virtualize */
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if (!vcpu->arch.pvr)
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goto out;
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/* PAPR only works with book3s_64 */
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if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
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goto out;
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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/* HV KVM can only do PAPR mode for now */
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if (!vcpu->arch.papr_enabled)
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goto out;
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#endif
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2011-12-20 15:34:43 +00:00
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#ifdef CONFIG_KVM_BOOKE_HV
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if (!cpu_has_feature(CPU_FTR_EMB_HV))
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goto out;
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#endif
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2011-08-10 11:57:08 +00:00
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r = true;
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out:
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vcpu->arch.sane = r;
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return r ? 0 : -EINVAL;
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}
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2008-04-17 04:28:09 +00:00
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int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
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{
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enum emulation_result er;
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int r;
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er = kvmppc_emulate_instruction(run, vcpu);
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switch (er) {
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case EMULATE_DONE:
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/* Future optimization: only reload non-volatiles if they were
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* actually modified. */
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r = RESUME_GUEST_NV;
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break;
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case EMULATE_DO_MMIO:
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run->exit_reason = KVM_EXIT_MMIO;
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/* We must reload nonvolatiles because "update" load/store
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* instructions modify register state. */
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/* Future optimization: only reload non-volatiles if they were
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* actually modified. */
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r = RESUME_HOST_NV;
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break;
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case EMULATE_FAIL:
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/* XXX Deliver Program interrupt to guest. */
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printk(KERN_EMERG "%s: emulation failed (%08x)\n", __func__,
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2010-04-15 22:11:40 +00:00
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kvmppc_get_last_inst(vcpu));
|
2008-04-17 04:28:09 +00:00
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r = RESUME_HOST;
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break;
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default:
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BUG();
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}
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return r;
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}
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2009-09-15 09:37:46 +00:00
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int kvm_arch_hardware_enable(void *garbage)
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2008-04-17 04:28:09 +00:00
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{
|
2009-09-15 09:37:46 +00:00
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return 0;
|
2008-04-17 04:28:09 +00:00
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}
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void kvm_arch_hardware_disable(void *garbage)
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{
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}
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int kvm_arch_hardware_setup(void)
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{
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return 0;
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}
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void kvm_arch_hardware_unsetup(void)
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{
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}
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void kvm_arch_check_processor_compat(void *rtn)
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{
|
2008-11-05 15:36:14 +00:00
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*(int *)rtn = kvmppc_core_check_processor_compat();
|
2008-04-17 04:28:09 +00:00
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}
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|
2012-01-04 09:25:20 +00:00
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int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
|
2008-04-17 04:28:09 +00:00
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{
|
2012-01-04 09:25:20 +00:00
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|
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if (type)
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return -EINVAL;
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|
2011-06-29 00:19:22 +00:00
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return kvmppc_core_init_vm(kvm);
|
2008-04-17 04:28:09 +00:00
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}
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|
2010-11-09 16:02:49 +00:00
|
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void kvm_arch_destroy_vm(struct kvm *kvm)
|
2008-04-17 04:28:09 +00:00
|
|
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{
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|
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|
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unsigned int i;
|
2009-06-09 12:56:29 +00:00
|
|
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struct kvm_vcpu *vcpu;
|
2008-04-17 04:28:09 +00:00
|
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|
|
2009-06-09 12:56:29 +00:00
|
|
|
kvm_for_each_vcpu(i, vcpu, kvm)
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|
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kvm_arch_vcpu_free(vcpu);
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|
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|
|
mutex_lock(&kvm->lock);
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|
for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
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|
kvm->vcpus[i] = NULL;
|
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|
|
atomic_set(&kvm->online_vcpus, 0);
|
2011-06-29 00:19:22 +00:00
|
|
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|
|
kvmppc_core_destroy_vm(kvm);
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|
|
2009-06-09 12:56:29 +00:00
|
|
|
mutex_unlock(&kvm->lock);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
2009-01-06 02:03:02 +00:00
|
|
|
void kvm_arch_sync_events(struct kvm *kvm)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
int kvm_dev_ioctl_check_extension(long ext)
|
|
|
|
|
{
|
|
|
|
|
int r;
|
|
|
|
|
|
|
|
|
|
switch (ext) {
|
2011-04-27 22:24:21 +00:00
|
|
|
#ifdef CONFIG_BOOKE
|
|
|
|
|
case KVM_CAP_PPC_BOOKE_SREGS:
|
|
|
|
|
#else
|
2009-11-30 03:02:02 +00:00
|
|
|
case KVM_CAP_PPC_SEGSTATE:
|
2011-09-14 19:45:23 +00:00
|
|
|
case KVM_CAP_PPC_HIOR:
|
2011-08-08 15:29:42 +00:00
|
|
|
case KVM_CAP_PPC_PAPR:
|
2011-04-27 22:24:21 +00:00
|
|
|
#endif
|
2010-03-24 20:48:18 +00:00
|
|
|
case KVM_CAP_PPC_UNSET_IRQ:
|
2010-08-30 11:50:45 +00:00
|
|
|
case KVM_CAP_PPC_IRQ_LEVEL:
|
2010-03-24 20:48:29 +00:00
|
|
|
case KVM_CAP_ENABLE_CAP:
|
2011-09-14 08:02:41 +00:00
|
|
|
case KVM_CAP_ONE_REG:
|
KVM: PPC: Add support for Book3S processors in hypervisor mode
This adds support for KVM running on 64-bit Book 3S processors,
specifically POWER7, in hypervisor mode. Using hypervisor mode means
that the guest can use the processor's supervisor mode. That means
that the guest can execute privileged instructions and access privileged
registers itself without trapping to the host. This gives excellent
performance, but does mean that KVM cannot emulate a processor
architecture other than the one that the hardware implements.
This code assumes that the guest is running paravirtualized using the
PAPR (Power Architecture Platform Requirements) interface, which is the
interface that IBM's PowerVM hypervisor uses. That means that existing
Linux distributions that run on IBM pSeries machines will also run
under KVM without modification. In order to communicate the PAPR
hypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code
to include/linux/kvm.h.
Currently the choice between book3s_hv support and book3s_pr support
(i.e. the existing code, which runs the guest in user mode) has to be
made at kernel configuration time, so a given kernel binary can only
do one or the other.
This new book3s_hv code doesn't support MMIO emulation at present.
Since we are running paravirtualized guests, this isn't a serious
restriction.
With the guest running in supervisor mode, most exceptions go straight
to the guest. We will never get data or instruction storage or segment
interrupts, alignment interrupts, decrementer interrupts, program
interrupts, single-step interrupts, etc., coming to the hypervisor from
the guest. Therefore this introduces a new KVMTEST_NONHV macro for the
exception entry path so that we don't have to do the KVM test on entry
to those exception handlers.
We do however get hypervisor decrementer, hypervisor data storage,
hypervisor instruction storage, and hypervisor emulation assist
interrupts, so we have to handle those.
In hypervisor mode, real-mode accesses can access all of RAM, not just
a limited amount. Therefore we put all the guest state in the vcpu.arch
and use the shadow_vcpu in the PACA only for temporary scratch space.
We allocate the vcpu with kzalloc rather than vzalloc, and we don't use
anything in the kvmppc_vcpu_book3s struct, so we don't allocate it.
We don't have a shared page with the guest, but we still need a
kvm_vcpu_arch_shared struct to store the values of various registers,
so we include one in the vcpu_arch struct.
The POWER7 processor has a restriction that all threads in a core have
to be in the same partition. MMU-on kernel code counts as a partition
(partition 0), so we have to do a partition switch on every entry to and
exit from the guest. At present we require the host and guest to run
in single-thread mode because of this hardware restriction.
This code allocates a hashed page table for the guest and initializes
it with HPTEs for the guest's Virtual Real Memory Area (VRMA). We
require that the guest memory is allocated using 16MB huge pages, in
order to simplify the low-level memory management. This also means that
we can get away without tracking paging activity in the host for now,
since huge pages can't be paged or swapped.
This also adds a few new exports needed by the book3s_hv code.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:21:34 +00:00
|
|
|
r = 1;
|
|
|
|
|
break;
|
|
|
|
|
#ifndef CONFIG_KVM_BOOK3S_64_HV
|
|
|
|
|
case KVM_CAP_PPC_PAIRED_SINGLES:
|
2010-03-24 20:48:30 +00:00
|
|
|
case KVM_CAP_PPC_OSI:
|
2010-07-29 12:48:08 +00:00
|
|
|
case KVM_CAP_PPC_GET_PVINFO:
|
2012-02-15 23:40:00 +00:00
|
|
|
#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
|
2011-08-18 20:25:21 +00:00
|
|
|
case KVM_CAP_SW_TLB:
|
|
|
|
|
#endif
|
2009-11-30 03:02:02 +00:00
|
|
|
r = 1;
|
|
|
|
|
break;
|
2008-05-30 14:05:56 +00:00
|
|
|
case KVM_CAP_COALESCED_MMIO:
|
|
|
|
|
r = KVM_COALESCED_MMIO_PAGE_OFFSET;
|
|
|
|
|
break;
|
2011-06-29 00:22:41 +00:00
|
|
|
#endif
|
2012-03-15 21:58:34 +00:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
2011-06-29 00:22:41 +00:00
|
|
|
case KVM_CAP_SPAPR_TCE:
|
KVM: PPC: Book3S HV: Make the guest hash table size configurable
This adds a new ioctl to enable userspace to control the size of the guest
hashed page table (HPT) and to clear it out when resetting the guest.
The KVM_PPC_ALLOCATE_HTAB ioctl is a VM ioctl and takes as its parameter
a pointer to a u32 containing the desired order of the HPT (log base 2
of the size in bytes), which is updated on successful return to the
actual order of the HPT which was allocated.
There must be no vcpus running at the time of this ioctl. To enforce
this, we now keep a count of the number of vcpus running in
kvm->arch.vcpus_running.
If the ioctl is called when a HPT has already been allocated, we don't
reallocate the HPT but just clear it out. We first clear the
kvm->arch.rma_setup_done flag, which has two effects: (a) since we hold
the kvm->lock mutex, it will prevent any vcpus from starting to run until
we're done, and (b) it means that the first vcpu to run after we're done
will re-establish the VRMA if necessary.
If userspace doesn't call this ioctl before running the first vcpu, the
kernel will allocate a default-sized HPT at that point. We do it then
rather than when creating the VM, as the code did previously, so that
userspace has a chance to do the ioctl if it wants.
When allocating the HPT, we can allocate either from the kernel page
allocator, or from the preallocated pool. If userspace is asking for
a different size from the preallocated HPTs, we first try to allocate
using the kernel page allocator. Then we try to allocate from the
preallocated pool, and then if that fails, we try allocating decreasing
sizes from the kernel page allocator, down to the minimum size allowed
(256kB). Note that the kernel page allocator limits allocations to
1 << CONFIG_FORCE_MAX_ZONEORDER pages, which by default corresponds to
16MB (on 64-bit powerpc, at least).
Signed-off-by: Paul Mackerras <paulus@samba.org>
[agraf: fix module compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-05-04 02:32:53 +00:00
|
|
|
case KVM_CAP_PPC_ALLOC_HTAB:
|
2011-06-29 00:22:41 +00:00
|
|
|
r = 1;
|
|
|
|
|
break;
|
2012-03-15 21:58:34 +00:00
|
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
|
#ifdef CONFIG_KVM_BOOK3S_64_HV
|
KVM: PPC: Allow book3s_hv guests to use SMT processor modes
This lifts the restriction that book3s_hv guests can only run one
hardware thread per core, and allows them to use up to 4 threads
per core on POWER7. The host still has to run single-threaded.
This capability is advertised to qemu through a new KVM_CAP_PPC_SMT
capability. The return value of the ioctl querying this capability
is the number of vcpus per virtual CPU core (vcore), currently 4.
To use this, the host kernel should be booted with all threads
active, and then all the secondary threads should be offlined.
This will put the secondary threads into nap mode. KVM will then
wake them from nap mode and use them for running guest code (while
they are still offline). To wake the secondary threads, we send
them an IPI using a new xics_wake_cpu() function, implemented in
arch/powerpc/sysdev/xics/icp-native.c. In other words, at this stage
we assume that the platform has a XICS interrupt controller and
we are using icp-native.c to drive it. Since the woken thread will
need to acknowledge and clear the IPI, we also export the base
physical address of the XICS registers using kvmppc_set_xics_phys()
for use in the low-level KVM book3s code.
When a vcpu is created, it is assigned to a virtual CPU core.
The vcore number is obtained by dividing the vcpu number by the
number of threads per core in the host. This number is exported
to userspace via the KVM_CAP_PPC_SMT capability. If qemu wishes
to run the guest in single-threaded mode, it should make all vcpu
numbers be multiples of the number of threads per core.
We distinguish three states of a vcpu: runnable (i.e., ready to execute
the guest), blocked (that is, idle), and busy in host. We currently
implement a policy that the vcore can run only when all its threads
are runnable or blocked. This way, if a vcpu needs to execute elsewhere
in the kernel or in qemu, it can do so without being starved of CPU
by the other vcpus.
When a vcore starts to run, it executes in the context of one of the
vcpu threads. The other vcpu threads all go to sleep and stay asleep
until something happens requiring the vcpu thread to return to qemu,
or to wake up to run the vcore (this can happen when another vcpu
thread goes from busy in host state to blocked).
It can happen that a vcpu goes from blocked to runnable state (e.g.
because of an interrupt), and the vcore it belongs to is already
running. In that case it can start to run immediately as long as
the none of the vcpus in the vcore have started to exit the guest.
We send the next free thread in the vcore an IPI to get it to start
to execute the guest. It synchronizes with the other threads via
the vcore->entry_exit_count field to make sure that it doesn't go
into the guest if the other vcpus are exiting by the time that it
is ready to actually enter the guest.
Note that there is no fixed relationship between the hardware thread
number and the vcpu number. Hardware threads are assigned to vcpus
as they become runnable, so we will always use the lower-numbered
hardware threads in preference to higher-numbered threads if not all
the vcpus in the vcore are runnable, regardless of which vcpus are
runnable.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:23:08 +00:00
|
|
|
case KVM_CAP_PPC_SMT:
|
|
|
|
|
r = threads_per_core;
|
|
|
|
|
break;
|
KVM: PPC: Allocate RMAs (Real Mode Areas) at boot for use by guests
This adds infrastructure which will be needed to allow book3s_hv KVM to
run on older POWER processors, including PPC970, which don't support
the Virtual Real Mode Area (VRMA) facility, but only the Real Mode
Offset (RMO) facility. These processors require a physically
contiguous, aligned area of memory for each guest. When the guest does
an access in real mode (MMU off), the address is compared against a
limit value, and if it is lower, the address is ORed with an offset
value (from the Real Mode Offset Register (RMOR)) and the result becomes
the real address for the access. The size of the RMA has to be one of
a set of supported values, which usually includes 64MB, 128MB, 256MB
and some larger powers of 2.
Since we are unlikely to be able to allocate 64MB or more of physically
contiguous memory after the kernel has been running for a while, we
allocate a pool of RMAs at boot time using the bootmem allocator. The
size and number of the RMAs can be set using the kvm_rma_size=xx and
kvm_rma_count=xx kernel command line options.
KVM exports a new capability, KVM_CAP_PPC_RMA, to signal the availability
of the pool of preallocated RMAs. The capability value is 1 if the
processor can use an RMA but doesn't require one (because it supports
the VRMA facility), or 2 if the processor requires an RMA for each guest.
This adds a new ioctl, KVM_ALLOCATE_RMA, which allocates an RMA from the
pool and returns a file descriptor which can be used to map the RMA. It
also returns the size of the RMA in the argument structure.
Having an RMA means we will get multiple KMV_SET_USER_MEMORY_REGION
ioctl calls from userspace. To cope with this, we now preallocate the
kvm->arch.ram_pginfo array when the VM is created with a size sufficient
for up to 64GB of guest memory. Subsequently we will get rid of this
array and use memory associated with each memslot instead.
This moves most of the code that translates the user addresses into
host pfns (page frame numbers) out of kvmppc_prepare_vrma up one level
to kvmppc_core_prepare_memory_region. Also, instead of having to look
up the VMA for each page in order to check the page size, we now check
that the pages we get are compound pages of 16MB. However, if we are
adding memory that is mapped to an RMA, we don't bother with calling
get_user_pages_fast and instead just offset from the base pfn for the
RMA.
Typically the RMA gets added after vcpus are created, which makes it
inconvenient to have the LPCR (logical partition control register) value
in the vcpu->arch struct, since the LPCR controls whether the processor
uses RMA or VRMA for the guest. This moves the LPCR value into the
kvm->arch struct and arranges for the MER (mediated external request)
bit, which is the only bit that varies between vcpus, to be set in
assembly code when going into the guest if there is a pending external
interrupt request.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:25:44 +00:00
|
|
|
case KVM_CAP_PPC_RMA:
|
|
|
|
|
r = 1;
|
KVM: PPC: book3s_hv: Add support for PPC970-family processors
This adds support for running KVM guests in supervisor mode on those
PPC970 processors that have a usable hypervisor mode. Unfortunately,
Apple G5 machines have supervisor mode disabled (MSR[HV] is forced to
1), but the YDL PowerStation does have a usable hypervisor mode.
There are several differences between the PPC970 and POWER7 in how
guests are managed. These differences are accommodated using the
CPU_FTR_ARCH_201 (PPC970) and CPU_FTR_ARCH_206 (POWER7) CPU feature
bits. Notably, on PPC970:
* The LPCR, LPID or RMOR registers don't exist, and the functions of
those registers are provided by bits in HID4 and one bit in HID0.
* External interrupts can be directed to the hypervisor, but unlike
POWER7 they are masked by MSR[EE] in non-hypervisor modes and use
SRR0/1 not HSRR0/1.
* There is no virtual RMA (VRMA) mode; the guest must use an RMO
(real mode offset) area.
* The TLB entries are not tagged with the LPID, so it is necessary to
flush the whole TLB on partition switch. Furthermore, when switching
partitions we have to ensure that no other CPU is executing the tlbie
or tlbsync instructions in either the old or the new partition,
otherwise undefined behaviour can occur.
* The PMU has 8 counters (PMC registers) rather than 6.
* The DSCR, PURR, SPURR, AMR, AMOR, UAMOR registers don't exist.
* The SLB has 64 entries rather than 32.
* There is no mediated external interrupt facility, so if we switch to
a guest that has a virtual external interrupt pending but the guest
has MSR[EE] = 0, we have to arrange to have an interrupt pending for
it so that we can get control back once it re-enables interrupts. We
do that by sending ourselves an IPI with smp_send_reschedule after
hard-disabling interrupts.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:40:08 +00:00
|
|
|
/* PPC970 requires an RMA */
|
|
|
|
|
if (cpu_has_feature(CPU_FTR_ARCH_201))
|
|
|
|
|
r = 2;
|
KVM: PPC: Allocate RMAs (Real Mode Areas) at boot for use by guests
This adds infrastructure which will be needed to allow book3s_hv KVM to
run on older POWER processors, including PPC970, which don't support
the Virtual Real Mode Area (VRMA) facility, but only the Real Mode
Offset (RMO) facility. These processors require a physically
contiguous, aligned area of memory for each guest. When the guest does
an access in real mode (MMU off), the address is compared against a
limit value, and if it is lower, the address is ORed with an offset
value (from the Real Mode Offset Register (RMOR)) and the result becomes
the real address for the access. The size of the RMA has to be one of
a set of supported values, which usually includes 64MB, 128MB, 256MB
and some larger powers of 2.
Since we are unlikely to be able to allocate 64MB or more of physically
contiguous memory after the kernel has been running for a while, we
allocate a pool of RMAs at boot time using the bootmem allocator. The
size and number of the RMAs can be set using the kvm_rma_size=xx and
kvm_rma_count=xx kernel command line options.
KVM exports a new capability, KVM_CAP_PPC_RMA, to signal the availability
of the pool of preallocated RMAs. The capability value is 1 if the
processor can use an RMA but doesn't require one (because it supports
the VRMA facility), or 2 if the processor requires an RMA for each guest.
This adds a new ioctl, KVM_ALLOCATE_RMA, which allocates an RMA from the
pool and returns a file descriptor which can be used to map the RMA. It
also returns the size of the RMA in the argument structure.
Having an RMA means we will get multiple KMV_SET_USER_MEMORY_REGION
ioctl calls from userspace. To cope with this, we now preallocate the
kvm->arch.ram_pginfo array when the VM is created with a size sufficient
for up to 64GB of guest memory. Subsequently we will get rid of this
array and use memory associated with each memslot instead.
This moves most of the code that translates the user addresses into
host pfns (page frame numbers) out of kvmppc_prepare_vrma up one level
to kvmppc_core_prepare_memory_region. Also, instead of having to look
up the VMA for each page in order to check the page size, we now check
that the pages we get are compound pages of 16MB. However, if we are
adding memory that is mapped to an RMA, we don't bother with calling
get_user_pages_fast and instead just offset from the base pfn for the
RMA.
Typically the RMA gets added after vcpus are created, which makes it
inconvenient to have the LPCR (logical partition control register) value
in the vcpu->arch struct, since the LPCR controls whether the processor
uses RMA or VRMA for the guest. This moves the LPCR value into the
kvm->arch struct and arranges for the MER (mediated external request)
bit, which is the only bit that varies between vcpus, to be set in
assembly code when going into the guest if there is a pending external
interrupt request.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:25:44 +00:00
|
|
|
break;
|
KVM: PPC: Implement MMU notifiers for Book3S HV guests
This adds the infrastructure to enable us to page out pages underneath
a Book3S HV guest, on processors that support virtualized partition
memory, that is, POWER7. Instead of pinning all the guest's pages,
we now look in the host userspace Linux page tables to find the
mapping for a given guest page. Then, if the userspace Linux PTE
gets invalidated, kvm_unmap_hva() gets called for that address, and
we replace all the guest HPTEs that refer to that page with absent
HPTEs, i.e. ones with the valid bit clear and the HPTE_V_ABSENT bit
set, which will cause an HDSI when the guest tries to access them.
Finally, the page fault handler is extended to reinstantiate the
guest HPTE when the guest tries to access a page which has been paged
out.
Since we can't intercept the guest DSI and ISI interrupts on PPC970,
we still have to pin all the guest pages on PPC970. We have a new flag,
kvm->arch.using_mmu_notifiers, that indicates whether we can page
guest pages out. If it is not set, the MMU notifier callbacks do
nothing and everything operates as before.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-12-12 12:38:05 +00:00
|
|
|
case KVM_CAP_SYNC_MMU:
|
|
|
|
|
r = cpu_has_feature(CPU_FTR_ARCH_206) ? 1 : 0;
|
|
|
|
|
break;
|
KVM: PPC: Add support for Book3S processors in hypervisor mode
This adds support for KVM running on 64-bit Book 3S processors,
specifically POWER7, in hypervisor mode. Using hypervisor mode means
that the guest can use the processor's supervisor mode. That means
that the guest can execute privileged instructions and access privileged
registers itself without trapping to the host. This gives excellent
performance, but does mean that KVM cannot emulate a processor
architecture other than the one that the hardware implements.
This code assumes that the guest is running paravirtualized using the
PAPR (Power Architecture Platform Requirements) interface, which is the
interface that IBM's PowerVM hypervisor uses. That means that existing
Linux distributions that run on IBM pSeries machines will also run
under KVM without modification. In order to communicate the PAPR
hypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code
to include/linux/kvm.h.
Currently the choice between book3s_hv support and book3s_pr support
(i.e. the existing code, which runs the guest in user mode) has to be
made at kernel configuration time, so a given kernel binary can only
do one or the other.
This new book3s_hv code doesn't support MMIO emulation at present.
Since we are running paravirtualized guests, this isn't a serious
restriction.
With the guest running in supervisor mode, most exceptions go straight
to the guest. We will never get data or instruction storage or segment
interrupts, alignment interrupts, decrementer interrupts, program
interrupts, single-step interrupts, etc., coming to the hypervisor from
the guest. Therefore this introduces a new KVMTEST_NONHV macro for the
exception entry path so that we don't have to do the KVM test on entry
to those exception handlers.
We do however get hypervisor decrementer, hypervisor data storage,
hypervisor instruction storage, and hypervisor emulation assist
interrupts, so we have to handle those.
In hypervisor mode, real-mode accesses can access all of RAM, not just
a limited amount. Therefore we put all the guest state in the vcpu.arch
and use the shadow_vcpu in the PACA only for temporary scratch space.
We allocate the vcpu with kzalloc rather than vzalloc, and we don't use
anything in the kvmppc_vcpu_book3s struct, so we don't allocate it.
We don't have a shared page with the guest, but we still need a
kvm_vcpu_arch_shared struct to store the values of various registers,
so we include one in the vcpu_arch struct.
The POWER7 processor has a restriction that all threads in a core have
to be in the same partition. MMU-on kernel code counts as a partition
(partition 0), so we have to do a partition switch on every entry to and
exit from the guest. At present we require the host and guest to run
in single-thread mode because of this hardware restriction.
This code allocates a hashed page table for the guest and initializes
it with HPTEs for the guest's Virtual Real Memory Area (VRMA). We
require that the guest memory is allocated using 16MB huge pages, in
order to simplify the low-level memory management. This also means that
we can get away without tracking paging activity in the host for now,
since huge pages can't be paged or swapped.
This also adds a few new exports needed by the book3s_hv code.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:21:34 +00:00
|
|
|
#endif
|
2011-12-07 16:55:57 +00:00
|
|
|
case KVM_CAP_NR_VCPUS:
|
|
|
|
|
/*
|
|
|
|
|
* Recommending a number of CPUs is somewhat arbitrary; we
|
|
|
|
|
* return the number of present CPUs for -HV (since a host
|
|
|
|
|
* will have secondary threads "offline"), and for other KVM
|
|
|
|
|
* implementations just count online CPUs.
|
|
|
|
|
*/
|
|
|
|
|
#ifdef CONFIG_KVM_BOOK3S_64_HV
|
|
|
|
|
r = num_present_cpus();
|
|
|
|
|
#else
|
|
|
|
|
r = num_online_cpus();
|
|
|
|
|
#endif
|
|
|
|
|
break;
|
|
|
|
|
case KVM_CAP_MAX_VCPUS:
|
|
|
|
|
r = KVM_MAX_VCPUS;
|
|
|
|
|
break;
|
2012-04-26 19:43:42 +00:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
|
|
case KVM_CAP_PPC_GET_SMMU_INFO:
|
|
|
|
|
r = 1;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
2008-04-17 04:28:09 +00:00
|
|
|
default:
|
|
|
|
|
r = 0;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return r;
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
long kvm_arch_dev_ioctl(struct file *filp,
|
|
|
|
|
unsigned int ioctl, unsigned long arg)
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
2012-02-08 04:02:18 +00:00
|
|
|
void kvm_arch_free_memslot(struct kvm_memory_slot *free,
|
|
|
|
|
struct kvm_memory_slot *dont)
|
|
|
|
|
{
|
2012-08-01 09:03:28 +00:00
|
|
|
if (!dont || free->arch.rmap != dont->arch.rmap) {
|
|
|
|
|
vfree(free->arch.rmap);
|
|
|
|
|
free->arch.rmap = NULL;
|
|
|
|
|
}
|
2012-02-08 04:02:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
|
|
|
|
|
{
|
2012-08-01 09:03:28 +00:00
|
|
|
slot->arch.rmap = vzalloc(npages * sizeof(*slot->arch.rmap));
|
|
|
|
|
if (!slot->arch.rmap)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
2012-02-08 04:02:18 +00:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2009-12-23 16:35:18 +00:00
|
|
|
int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|
|
|
|
struct kvm_memory_slot *memslot,
|
|
|
|
|
struct kvm_memory_slot old,
|
|
|
|
|
struct kvm_userspace_memory_region *mem,
|
|
|
|
|
int user_alloc)
|
2008-04-17 04:28:09 +00:00
|
|
|
{
|
2011-06-29 00:19:22 +00:00
|
|
|
return kvmppc_core_prepare_memory_region(kvm, mem);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
2009-12-23 16:35:18 +00:00
|
|
|
void kvm_arch_commit_memory_region(struct kvm *kvm,
|
|
|
|
|
struct kvm_userspace_memory_region *mem,
|
|
|
|
|
struct kvm_memory_slot old,
|
|
|
|
|
int user_alloc)
|
|
|
|
|
{
|
2011-06-29 00:19:22 +00:00
|
|
|
kvmppc_core_commit_memory_region(kvm, mem);
|
2009-12-23 16:35:18 +00:00
|
|
|
}
|
|
|
|
|
|
2012-08-24 18:54:57 +00:00
|
|
|
void kvm_arch_flush_shadow_all(struct kvm *kvm)
|
|
|
|
|
{
|
|
|
|
|
}
|
2009-12-23 16:35:18 +00:00
|
|
|
|
2012-08-24 18:54:57 +00:00
|
|
|
void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
|
|
|
|
|
struct kvm_memory_slot *slot)
|
2008-07-10 23:49:31 +00:00
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
|
|
|
|
|
{
|
2008-12-02 21:51:57 +00:00
|
|
|
struct kvm_vcpu *vcpu;
|
|
|
|
|
vcpu = kvmppc_core_vcpu_create(kvm, id);
|
2011-12-06 21:19:42 +00:00
|
|
|
if (!IS_ERR(vcpu)) {
|
|
|
|
|
vcpu->arch.wqp = &vcpu->wq;
|
2010-03-09 06:13:43 +00:00
|
|
|
kvmppc_create_vcpu_debugfs(vcpu, id);
|
2011-12-06 21:19:42 +00:00
|
|
|
}
|
2008-12-02 21:51:57 +00:00
|
|
|
return vcpu;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
2010-02-22 15:52:14 +00:00
|
|
|
/* Make sure we're not using the vcpu anymore */
|
|
|
|
|
hrtimer_cancel(&vcpu->arch.dec_timer);
|
|
|
|
|
tasklet_kill(&vcpu->arch.tasklet);
|
|
|
|
|
|
2008-12-02 21:51:57 +00:00
|
|
|
kvmppc_remove_vcpu_debugfs(vcpu);
|
2008-11-05 15:36:18 +00:00
|
|
|
kvmppc_core_vcpu_free(vcpu);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
|
|
|
|
kvm_arch_vcpu_free(vcpu);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
2008-11-05 15:36:14 +00:00
|
|
|
return kvmppc_core_pending_dec(vcpu);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
2009-11-02 12:02:31 +00:00
|
|
|
/*
|
|
|
|
|
* low level hrtimer wake routine. Because this runs in hardirq context
|
|
|
|
|
* we schedule a tasklet to do the real work.
|
|
|
|
|
*/
|
|
|
|
|
enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
|
|
|
|
|
{
|
|
|
|
|
struct kvm_vcpu *vcpu;
|
|
|
|
|
|
|
|
|
|
vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
|
|
|
|
|
tasklet_schedule(&vcpu->arch.tasklet);
|
|
|
|
|
|
|
|
|
|
return HRTIMER_NORESTART;
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
2009-11-02 12:02:31 +00:00
|
|
|
hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
|
|
|
|
|
tasklet_init(&vcpu->arch.tasklet, kvmppc_decrementer_func, (ulong)vcpu);
|
|
|
|
|
vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
|
KVM: PPC: Add support for Book3S processors in hypervisor mode
This adds support for KVM running on 64-bit Book 3S processors,
specifically POWER7, in hypervisor mode. Using hypervisor mode means
that the guest can use the processor's supervisor mode. That means
that the guest can execute privileged instructions and access privileged
registers itself without trapping to the host. This gives excellent
performance, but does mean that KVM cannot emulate a processor
architecture other than the one that the hardware implements.
This code assumes that the guest is running paravirtualized using the
PAPR (Power Architecture Platform Requirements) interface, which is the
interface that IBM's PowerVM hypervisor uses. That means that existing
Linux distributions that run on IBM pSeries machines will also run
under KVM without modification. In order to communicate the PAPR
hypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code
to include/linux/kvm.h.
Currently the choice between book3s_hv support and book3s_pr support
(i.e. the existing code, which runs the guest in user mode) has to be
made at kernel configuration time, so a given kernel binary can only
do one or the other.
This new book3s_hv code doesn't support MMIO emulation at present.
Since we are running paravirtualized guests, this isn't a serious
restriction.
With the guest running in supervisor mode, most exceptions go straight
to the guest. We will never get data or instruction storage or segment
interrupts, alignment interrupts, decrementer interrupts, program
interrupts, single-step interrupts, etc., coming to the hypervisor from
the guest. Therefore this introduces a new KVMTEST_NONHV macro for the
exception entry path so that we don't have to do the KVM test on entry
to those exception handlers.
We do however get hypervisor decrementer, hypervisor data storage,
hypervisor instruction storage, and hypervisor emulation assist
interrupts, so we have to handle those.
In hypervisor mode, real-mode accesses can access all of RAM, not just
a limited amount. Therefore we put all the guest state in the vcpu.arch
and use the shadow_vcpu in the PACA only for temporary scratch space.
We allocate the vcpu with kzalloc rather than vzalloc, and we don't use
anything in the kvmppc_vcpu_book3s struct, so we don't allocate it.
We don't have a shared page with the guest, but we still need a
kvm_vcpu_arch_shared struct to store the values of various registers,
so we include one in the vcpu_arch struct.
The POWER7 processor has a restriction that all threads in a core have
to be in the same partition. MMU-on kernel code counts as a partition
(partition 0), so we have to do a partition switch on every entry to and
exit from the guest. At present we require the host and guest to run
in single-thread mode because of this hardware restriction.
This code allocates a hashed page table for the guest and initializes
it with HPTEs for the guest's Virtual Real Memory Area (VRMA). We
require that the guest memory is allocated using 16MB huge pages, in
order to simplify the low-level memory management. This also means that
we can get away without tracking paging activity in the host for now,
since huge pages can't be paged or swapped.
This also adds a few new exports needed by the book3s_hv code.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:21:34 +00:00
|
|
|
vcpu->arch.dec_expires = ~(u64)0;
|
2008-04-17 04:28:09 +00:00
|
|
|
|
2011-03-25 05:02:13 +00:00
|
|
|
#ifdef CONFIG_KVM_EXIT_TIMING
|
|
|
|
|
mutex_init(&vcpu->arch.exit_timing_lock);
|
|
|
|
|
#endif
|
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
2009-01-03 22:22:59 +00:00
|
|
|
kvmppc_mmu_destroy(vcpu);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
|
|
|
|
|
{
|
2011-04-27 22:24:10 +00:00
|
|
|
#ifdef CONFIG_BOOKE
|
|
|
|
|
/*
|
|
|
|
|
* vrsave (formerly usprg0) isn't used by Linux, but may
|
|
|
|
|
* be used by the guest.
|
|
|
|
|
*
|
|
|
|
|
* On non-booke this is associated with Altivec and
|
|
|
|
|
* is handled by code in book3s.c.
|
|
|
|
|
*/
|
|
|
|
|
mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
|
|
|
|
|
#endif
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_core_vcpu_load(vcpu, cpu);
|
KVM: PPC: Add support for Book3S processors in hypervisor mode
This adds support for KVM running on 64-bit Book 3S processors,
specifically POWER7, in hypervisor mode. Using hypervisor mode means
that the guest can use the processor's supervisor mode. That means
that the guest can execute privileged instructions and access privileged
registers itself without trapping to the host. This gives excellent
performance, but does mean that KVM cannot emulate a processor
architecture other than the one that the hardware implements.
This code assumes that the guest is running paravirtualized using the
PAPR (Power Architecture Platform Requirements) interface, which is the
interface that IBM's PowerVM hypervisor uses. That means that existing
Linux distributions that run on IBM pSeries machines will also run
under KVM without modification. In order to communicate the PAPR
hypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code
to include/linux/kvm.h.
Currently the choice between book3s_hv support and book3s_pr support
(i.e. the existing code, which runs the guest in user mode) has to be
made at kernel configuration time, so a given kernel binary can only
do one or the other.
This new book3s_hv code doesn't support MMIO emulation at present.
Since we are running paravirtualized guests, this isn't a serious
restriction.
With the guest running in supervisor mode, most exceptions go straight
to the guest. We will never get data or instruction storage or segment
interrupts, alignment interrupts, decrementer interrupts, program
interrupts, single-step interrupts, etc., coming to the hypervisor from
the guest. Therefore this introduces a new KVMTEST_NONHV macro for the
exception entry path so that we don't have to do the KVM test on entry
to those exception handlers.
We do however get hypervisor decrementer, hypervisor data storage,
hypervisor instruction storage, and hypervisor emulation assist
interrupts, so we have to handle those.
In hypervisor mode, real-mode accesses can access all of RAM, not just
a limited amount. Therefore we put all the guest state in the vcpu.arch
and use the shadow_vcpu in the PACA only for temporary scratch space.
We allocate the vcpu with kzalloc rather than vzalloc, and we don't use
anything in the kvmppc_vcpu_book3s struct, so we don't allocate it.
We don't have a shared page with the guest, but we still need a
kvm_vcpu_arch_shared struct to store the values of various registers,
so we include one in the vcpu_arch struct.
The POWER7 processor has a restriction that all threads in a core have
to be in the same partition. MMU-on kernel code counts as a partition
(partition 0), so we have to do a partition switch on every entry to and
exit from the guest. At present we require the host and guest to run
in single-thread mode because of this hardware restriction.
This code allocates a hashed page table for the guest and initializes
it with HPTEs for the guest's Virtual Real Memory Area (VRMA). We
require that the guest memory is allocated using 16MB huge pages, in
order to simplify the low-level memory management. This also means that
we can get away without tracking paging activity in the host for now,
since huge pages can't be paged or swapped.
This also adds a few new exports needed by the book3s_hv code.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:21:34 +00:00
|
|
|
vcpu->cpu = smp_processor_id();
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
2008-11-05 15:36:14 +00:00
|
|
|
kvmppc_core_vcpu_put(vcpu);
|
2011-04-27 22:24:10 +00:00
|
|
|
#ifdef CONFIG_BOOKE
|
|
|
|
|
vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
|
|
|
|
|
#endif
|
KVM: PPC: Add support for Book3S processors in hypervisor mode
This adds support for KVM running on 64-bit Book 3S processors,
specifically POWER7, in hypervisor mode. Using hypervisor mode means
that the guest can use the processor's supervisor mode. That means
that the guest can execute privileged instructions and access privileged
registers itself without trapping to the host. This gives excellent
performance, but does mean that KVM cannot emulate a processor
architecture other than the one that the hardware implements.
This code assumes that the guest is running paravirtualized using the
PAPR (Power Architecture Platform Requirements) interface, which is the
interface that IBM's PowerVM hypervisor uses. That means that existing
Linux distributions that run on IBM pSeries machines will also run
under KVM without modification. In order to communicate the PAPR
hypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code
to include/linux/kvm.h.
Currently the choice between book3s_hv support and book3s_pr support
(i.e. the existing code, which runs the guest in user mode) has to be
made at kernel configuration time, so a given kernel binary can only
do one or the other.
This new book3s_hv code doesn't support MMIO emulation at present.
Since we are running paravirtualized guests, this isn't a serious
restriction.
With the guest running in supervisor mode, most exceptions go straight
to the guest. We will never get data or instruction storage or segment
interrupts, alignment interrupts, decrementer interrupts, program
interrupts, single-step interrupts, etc., coming to the hypervisor from
the guest. Therefore this introduces a new KVMTEST_NONHV macro for the
exception entry path so that we don't have to do the KVM test on entry
to those exception handlers.
We do however get hypervisor decrementer, hypervisor data storage,
hypervisor instruction storage, and hypervisor emulation assist
interrupts, so we have to handle those.
In hypervisor mode, real-mode accesses can access all of RAM, not just
a limited amount. Therefore we put all the guest state in the vcpu.arch
and use the shadow_vcpu in the PACA only for temporary scratch space.
We allocate the vcpu with kzalloc rather than vzalloc, and we don't use
anything in the kvmppc_vcpu_book3s struct, so we don't allocate it.
We don't have a shared page with the guest, but we still need a
kvm_vcpu_arch_shared struct to store the values of various registers,
so we include one in the vcpu_arch struct.
The POWER7 processor has a restriction that all threads in a core have
to be in the same partition. MMU-on kernel code counts as a partition
(partition 0), so we have to do a partition switch on every entry to and
exit from the guest. At present we require the host and guest to run
in single-thread mode because of this hardware restriction.
This code allocates a hashed page table for the guest and initializes
it with HPTEs for the guest's Virtual Real Memory Area (VRMA). We
require that the guest memory is allocated using 16MB huge pages, in
order to simplify the low-level memory management. This also means that
we can get away without tracking paging activity in the host for now,
since huge pages can't be paged or swapped.
This also adds a few new exports needed by the book3s_hv code.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:21:34 +00:00
|
|
|
vcpu->cpu = -1;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
2008-12-15 12:52:10 +00:00
|
|
|
int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
2009-01-04 19:51:09 +00:00
|
|
|
struct kvm_guest_debug *dbg)
|
2008-04-17 04:28:09 +00:00
|
|
|
{
|
2009-01-04 19:51:09 +00:00
|
|
|
return -EINVAL;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
|
|
|
|
|
struct kvm_run *run)
|
|
|
|
|
{
|
2010-01-08 01:58:01 +00:00
|
|
|
kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, run->dcr.data);
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
|
|
|
|
|
struct kvm_run *run)
|
|
|
|
|
{
|
2010-06-11 11:23:26 +00:00
|
|
|
u64 uninitialized_var(gpr);
|
2008-04-17 04:28:09 +00:00
|
|
|
|
2010-01-08 01:58:01 +00:00
|
|
|
if (run->mmio.len > sizeof(gpr)) {
|
2008-04-17 04:28:09 +00:00
|
|
|
printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (vcpu->arch.mmio_is_bigendian) {
|
|
|
|
|
switch (run->mmio.len) {
|
2010-02-19 10:00:29 +00:00
|
|
|
case 8: gpr = *(u64 *)run->mmio.data; break;
|
2010-01-08 01:58:01 +00:00
|
|
|
case 4: gpr = *(u32 *)run->mmio.data; break;
|
|
|
|
|
case 2: gpr = *(u16 *)run->mmio.data; break;
|
|
|
|
|
case 1: gpr = *(u8 *)run->mmio.data; break;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
/* Convert BE data from userland back to LE. */
|
|
|
|
|
switch (run->mmio.len) {
|
2010-01-08 01:58:01 +00:00
|
|
|
case 4: gpr = ld_le32((u32 *)run->mmio.data); break;
|
|
|
|
|
case 2: gpr = ld_le16((u16 *)run->mmio.data); break;
|
|
|
|
|
case 1: gpr = *(u8 *)run->mmio.data; break;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
}
|
2010-01-08 01:58:01 +00:00
|
|
|
|
2010-02-19 10:00:30 +00:00
|
|
|
if (vcpu->arch.mmio_sign_extend) {
|
|
|
|
|
switch (run->mmio.len) {
|
|
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
|
case 4:
|
|
|
|
|
gpr = (s64)(s32)gpr;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
case 2:
|
|
|
|
|
gpr = (s64)(s16)gpr;
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
gpr = (s64)(s8)gpr;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2010-01-08 01:58:01 +00:00
|
|
|
kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
|
2010-02-19 10:00:29 +00:00
|
|
|
|
2012-01-07 01:07:38 +00:00
|
|
|
switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
|
|
|
|
|
case KVM_MMIO_REG_GPR:
|
2010-02-19 10:00:29 +00:00
|
|
|
kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
|
|
|
|
|
break;
|
2012-01-07 01:07:38 +00:00
|
|
|
case KVM_MMIO_REG_FPR:
|
|
|
|
|
vcpu->arch.fpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
|
2010-02-19 10:00:29 +00:00
|
|
|
break;
|
2010-04-01 13:33:21 +00:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
2012-01-07 01:07:38 +00:00
|
|
|
case KVM_MMIO_REG_QPR:
|
|
|
|
|
vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
|
2010-02-19 10:00:29 +00:00
|
|
|
break;
|
2012-01-07 01:07:38 +00:00
|
|
|
case KVM_MMIO_REG_FQPR:
|
|
|
|
|
vcpu->arch.fpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
|
|
|
|
|
vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
|
2010-02-19 10:00:29 +00:00
|
|
|
break;
|
2010-04-01 13:33:21 +00:00
|
|
|
#endif
|
2010-02-19 10:00:29 +00:00
|
|
|
default:
|
|
|
|
|
BUG();
|
|
|
|
|
}
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
|
|
|
|
unsigned int rt, unsigned int bytes, int is_bigendian)
|
|
|
|
|
{
|
|
|
|
|
if (bytes > sizeof(run->mmio.data)) {
|
|
|
|
|
printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
|
|
|
|
|
run->mmio.len);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
run->mmio.phys_addr = vcpu->arch.paddr_accessed;
|
|
|
|
|
run->mmio.len = bytes;
|
|
|
|
|
run->mmio.is_write = 0;
|
|
|
|
|
|
|
|
|
|
vcpu->arch.io_gpr = rt;
|
|
|
|
|
vcpu->arch.mmio_is_bigendian = is_bigendian;
|
|
|
|
|
vcpu->mmio_needed = 1;
|
|
|
|
|
vcpu->mmio_is_write = 0;
|
2010-02-19 10:00:30 +00:00
|
|
|
vcpu->arch.mmio_sign_extend = 0;
|
2008-04-17 04:28:09 +00:00
|
|
|
|
|
|
|
|
return EMULATE_DO_MMIO;
|
|
|
|
|
}
|
|
|
|
|
|
2010-02-19 10:00:30 +00:00
|
|
|
/* Same as above, but sign extends */
|
|
|
|
|
int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
|
|
|
|
unsigned int rt, unsigned int bytes, int is_bigendian)
|
|
|
|
|
{
|
|
|
|
|
int r;
|
|
|
|
|
|
|
|
|
|
r = kvmppc_handle_load(run, vcpu, rt, bytes, is_bigendian);
|
|
|
|
|
vcpu->arch.mmio_sign_extend = 1;
|
|
|
|
|
|
|
|
|
|
return r;
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
2010-02-19 10:00:29 +00:00
|
|
|
u64 val, unsigned int bytes, int is_bigendian)
|
2008-04-17 04:28:09 +00:00
|
|
|
{
|
|
|
|
|
void *data = run->mmio.data;
|
|
|
|
|
|
|
|
|
|
if (bytes > sizeof(run->mmio.data)) {
|
|
|
|
|
printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
|
|
|
|
|
run->mmio.len);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
run->mmio.phys_addr = vcpu->arch.paddr_accessed;
|
|
|
|
|
run->mmio.len = bytes;
|
|
|
|
|
run->mmio.is_write = 1;
|
|
|
|
|
vcpu->mmio_needed = 1;
|
|
|
|
|
vcpu->mmio_is_write = 1;
|
|
|
|
|
|
|
|
|
|
/* Store the value at the lowest bytes in 'data'. */
|
|
|
|
|
if (is_bigendian) {
|
|
|
|
|
switch (bytes) {
|
2010-02-19 10:00:29 +00:00
|
|
|
case 8: *(u64 *)data = val; break;
|
2008-04-17 04:28:09 +00:00
|
|
|
case 4: *(u32 *)data = val; break;
|
|
|
|
|
case 2: *(u16 *)data = val; break;
|
|
|
|
|
case 1: *(u8 *)data = val; break;
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
/* Store LE value into 'data'. */
|
|
|
|
|
switch (bytes) {
|
|
|
|
|
case 4: st_le32(data, val); break;
|
|
|
|
|
case 2: st_le16(data, val); break;
|
|
|
|
|
case 1: *(u8 *)data = val; break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return EMULATE_DO_MMIO;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
|
|
|
|
|
{
|
|
|
|
|
int r;
|
|
|
|
|
sigset_t sigsaved;
|
|
|
|
|
|
|
|
|
|
if (vcpu->sigset_active)
|
|
|
|
|
sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
|
|
|
|
|
|
|
|
|
|
if (vcpu->mmio_needed) {
|
|
|
|
|
if (!vcpu->mmio_is_write)
|
|
|
|
|
kvmppc_complete_mmio_load(vcpu, run);
|
|
|
|
|
vcpu->mmio_needed = 0;
|
|
|
|
|
} else if (vcpu->arch.dcr_needed) {
|
|
|
|
|
if (!vcpu->arch.dcr_is_write)
|
|
|
|
|
kvmppc_complete_dcr_load(vcpu, run);
|
|
|
|
|
vcpu->arch.dcr_needed = 0;
|
2010-03-24 20:48:30 +00:00
|
|
|
} else if (vcpu->arch.osi_needed) {
|
|
|
|
|
u64 *gprs = run->osi.gprs;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < 32; i++)
|
|
|
|
|
kvmppc_set_gpr(vcpu, i, gprs[i]);
|
|
|
|
|
vcpu->arch.osi_needed = 0;
|
KVM: PPC: Add support for Book3S processors in hypervisor mode
This adds support for KVM running on 64-bit Book 3S processors,
specifically POWER7, in hypervisor mode. Using hypervisor mode means
that the guest can use the processor's supervisor mode. That means
that the guest can execute privileged instructions and access privileged
registers itself without trapping to the host. This gives excellent
performance, but does mean that KVM cannot emulate a processor
architecture other than the one that the hardware implements.
This code assumes that the guest is running paravirtualized using the
PAPR (Power Architecture Platform Requirements) interface, which is the
interface that IBM's PowerVM hypervisor uses. That means that existing
Linux distributions that run on IBM pSeries machines will also run
under KVM without modification. In order to communicate the PAPR
hypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code
to include/linux/kvm.h.
Currently the choice between book3s_hv support and book3s_pr support
(i.e. the existing code, which runs the guest in user mode) has to be
made at kernel configuration time, so a given kernel binary can only
do one or the other.
This new book3s_hv code doesn't support MMIO emulation at present.
Since we are running paravirtualized guests, this isn't a serious
restriction.
With the guest running in supervisor mode, most exceptions go straight
to the guest. We will never get data or instruction storage or segment
interrupts, alignment interrupts, decrementer interrupts, program
interrupts, single-step interrupts, etc., coming to the hypervisor from
the guest. Therefore this introduces a new KVMTEST_NONHV macro for the
exception entry path so that we don't have to do the KVM test on entry
to those exception handlers.
We do however get hypervisor decrementer, hypervisor data storage,
hypervisor instruction storage, and hypervisor emulation assist
interrupts, so we have to handle those.
In hypervisor mode, real-mode accesses can access all of RAM, not just
a limited amount. Therefore we put all the guest state in the vcpu.arch
and use the shadow_vcpu in the PACA only for temporary scratch space.
We allocate the vcpu with kzalloc rather than vzalloc, and we don't use
anything in the kvmppc_vcpu_book3s struct, so we don't allocate it.
We don't have a shared page with the guest, but we still need a
kvm_vcpu_arch_shared struct to store the values of various registers,
so we include one in the vcpu_arch struct.
The POWER7 processor has a restriction that all threads in a core have
to be in the same partition. MMU-on kernel code counts as a partition
(partition 0), so we have to do a partition switch on every entry to and
exit from the guest. At present we require the host and guest to run
in single-thread mode because of this hardware restriction.
This code allocates a hashed page table for the guest and initializes
it with HPTEs for the guest's Virtual Real Memory Area (VRMA). We
require that the guest memory is allocated using 16MB huge pages, in
order to simplify the low-level memory management. This also means that
we can get away without tracking paging activity in the host for now,
since huge pages can't be paged or swapped.
This also adds a few new exports needed by the book3s_hv code.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:21:34 +00:00
|
|
|
} else if (vcpu->arch.hcall_needed) {
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
|
|
|
|
|
for (i = 0; i < 9; ++i)
|
|
|
|
|
kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
|
|
|
|
|
vcpu->arch.hcall_needed = 0;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
2011-06-29 00:19:50 +00:00
|
|
|
r = kvmppc_vcpu_run(run, vcpu);
|
2008-04-17 04:28:09 +00:00
|
|
|
|
|
|
|
|
if (vcpu->sigset_active)
|
|
|
|
|
sigprocmask(SIG_SETMASK, &sigsaved, NULL);
|
|
|
|
|
|
|
|
|
|
return r;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
|
|
|
|
|
{
|
KVM: PPC: Implement H_CEDE hcall for book3s_hv in real-mode code
With a KVM guest operating in SMT4 mode (i.e. 4 hardware threads per
core), whenever a CPU goes idle, we have to pull all the other
hardware threads in the core out of the guest, because the H_CEDE
hcall is handled in the kernel. This is inefficient.
This adds code to book3s_hv_rmhandlers.S to handle the H_CEDE hcall
in real mode. When a guest vcpu does an H_CEDE hcall, we now only
exit to the kernel if all the other vcpus in the same core are also
idle. Otherwise we mark this vcpu as napping, save state that could
be lost in nap mode (mainly GPRs and FPRs), and execute the nap
instruction. When the thread wakes up, because of a decrementer or
external interrupt, we come back in at kvm_start_guest (from the
system reset interrupt vector), find the `napping' flag set in the
paca, and go to the resume path.
This has some other ramifications. First, when starting a core, we
now start all the threads, both those that are immediately runnable and
those that are idle. This is so that we don't have to pull all the
threads out of the guest when an idle thread gets a decrementer interrupt
and wants to start running. In fact the idle threads will all start
with the H_CEDE hcall returning; being idle they will just do another
H_CEDE immediately and go to nap mode.
This required some changes to kvmppc_run_core() and kvmppc_run_vcpu().
These functions have been restructured to make them simpler and clearer.
We introduce a level of indirection in the wait queue that gets woken
when external and decrementer interrupts get generated for a vcpu, so
that we can have the 4 vcpus in a vcore using the same wait queue.
We need this because the 4 vcpus are being handled by one thread.
Secondly, when we need to exit from the guest to the kernel, we now
have to generate an IPI for any napping threads, because an HDEC
interrupt doesn't wake up a napping thread.
Thirdly, we now need to be able to handle virtual external interrupts
and decrementer interrupts becoming pending while a thread is napping,
and deliver those interrupts to the guest when the thread wakes.
This is done in kvmppc_cede_reentry, just before fast_guest_return.
Finally, since we are not using the generic kvm_vcpu_block for book3s_hv,
and hence not calling kvm_arch_vcpu_runnable, we can remove the #ifdef
from kvm_arch_vcpu_runnable.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-07-23 07:42:46 +00:00
|
|
|
if (irq->irq == KVM_INTERRUPT_UNSET) {
|
2010-03-24 20:48:18 +00:00
|
|
|
kvmppc_core_dequeue_external(vcpu, irq);
|
KVM: PPC: Implement H_CEDE hcall for book3s_hv in real-mode code
With a KVM guest operating in SMT4 mode (i.e. 4 hardware threads per
core), whenever a CPU goes idle, we have to pull all the other
hardware threads in the core out of the guest, because the H_CEDE
hcall is handled in the kernel. This is inefficient.
This adds code to book3s_hv_rmhandlers.S to handle the H_CEDE hcall
in real mode. When a guest vcpu does an H_CEDE hcall, we now only
exit to the kernel if all the other vcpus in the same core are also
idle. Otherwise we mark this vcpu as napping, save state that could
be lost in nap mode (mainly GPRs and FPRs), and execute the nap
instruction. When the thread wakes up, because of a decrementer or
external interrupt, we come back in at kvm_start_guest (from the
system reset interrupt vector), find the `napping' flag set in the
paca, and go to the resume path.
This has some other ramifications. First, when starting a core, we
now start all the threads, both those that are immediately runnable and
those that are idle. This is so that we don't have to pull all the
threads out of the guest when an idle thread gets a decrementer interrupt
and wants to start running. In fact the idle threads will all start
with the H_CEDE hcall returning; being idle they will just do another
H_CEDE immediately and go to nap mode.
This required some changes to kvmppc_run_core() and kvmppc_run_vcpu().
These functions have been restructured to make them simpler and clearer.
We introduce a level of indirection in the wait queue that gets woken
when external and decrementer interrupts get generated for a vcpu, so
that we can have the 4 vcpus in a vcore using the same wait queue.
We need this because the 4 vcpus are being handled by one thread.
Secondly, when we need to exit from the guest to the kernel, we now
have to generate an IPI for any napping threads, because an HDEC
interrupt doesn't wake up a napping thread.
Thirdly, we now need to be able to handle virtual external interrupts
and decrementer interrupts becoming pending while a thread is napping,
and deliver those interrupts to the guest when the thread wakes.
This is done in kvmppc_cede_reentry, just before fast_guest_return.
Finally, since we are not using the generic kvm_vcpu_block for book3s_hv,
and hence not calling kvm_arch_vcpu_runnable, we can remove the #ifdef
from kvm_arch_vcpu_runnable.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-07-23 07:42:46 +00:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
kvmppc_core_queue_external(vcpu, irq);
|
2012-03-08 21:44:24 +00:00
|
|
|
|
2011-11-17 12:39:59 +00:00
|
|
|
kvm_vcpu_kick(vcpu);
|
2008-04-25 22:55:49 +00:00
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2010-03-24 20:48:29 +00:00
|
|
|
static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
|
|
|
|
|
struct kvm_enable_cap *cap)
|
|
|
|
|
{
|
|
|
|
|
int r;
|
|
|
|
|
|
|
|
|
|
if (cap->flags)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
switch (cap->cap) {
|
2010-03-24 20:48:30 +00:00
|
|
|
case KVM_CAP_PPC_OSI:
|
|
|
|
|
r = 0;
|
|
|
|
|
vcpu->arch.osi_enabled = true;
|
|
|
|
|
break;
|
2011-08-08 15:29:42 +00:00
|
|
|
case KVM_CAP_PPC_PAPR:
|
|
|
|
|
r = 0;
|
|
|
|
|
vcpu->arch.papr_enabled = true;
|
|
|
|
|
break;
|
2012-02-15 23:40:00 +00:00
|
|
|
#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
|
2011-08-18 20:25:21 +00:00
|
|
|
case KVM_CAP_SW_TLB: {
|
|
|
|
|
struct kvm_config_tlb cfg;
|
|
|
|
|
void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
|
|
|
|
|
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2010-03-24 20:48:29 +00:00
|
|
|
default:
|
|
|
|
|
r = -EINVAL;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2011-08-10 11:57:08 +00:00
|
|
|
if (!r)
|
|
|
|
|
r = kvmppc_sanity_check(vcpu);
|
|
|
|
|
|
2010-03-24 20:48:29 +00:00
|
|
|
return r;
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
|
|
|
|
|
struct kvm_mp_state *mp_state)
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
|
|
|
|
|
struct kvm_mp_state *mp_state)
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
long kvm_arch_vcpu_ioctl(struct file *filp,
|
|
|
|
|
unsigned int ioctl, unsigned long arg)
|
|
|
|
|
{
|
|
|
|
|
struct kvm_vcpu *vcpu = filp->private_data;
|
|
|
|
|
void __user *argp = (void __user *)arg;
|
|
|
|
|
long r;
|
|
|
|
|
|
2010-05-13 09:35:17 +00:00
|
|
|
switch (ioctl) {
|
|
|
|
|
case KVM_INTERRUPT: {
|
2008-04-17 04:28:09 +00:00
|
|
|
struct kvm_interrupt irq;
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (copy_from_user(&irq, argp, sizeof(irq)))
|
2010-05-13 09:35:17 +00:00
|
|
|
goto out;
|
2008-04-17 04:28:09 +00:00
|
|
|
r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
|
2010-05-13 09:35:17 +00:00
|
|
|
goto out;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
2010-05-13 09:30:43 +00:00
|
|
|
|
2010-03-24 20:48:29 +00:00
|
|
|
case KVM_ENABLE_CAP:
|
|
|
|
|
{
|
|
|
|
|
struct kvm_enable_cap cap;
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (copy_from_user(&cap, argp, sizeof(cap)))
|
|
|
|
|
goto out;
|
|
|
|
|
r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2011-08-18 20:25:21 +00:00
|
|
|
|
2011-09-14 08:02:41 +00:00
|
|
|
case KVM_SET_ONE_REG:
|
|
|
|
|
case KVM_GET_ONE_REG:
|
|
|
|
|
{
|
|
|
|
|
struct kvm_one_reg reg;
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (copy_from_user(®, argp, sizeof(reg)))
|
|
|
|
|
goto out;
|
|
|
|
|
if (ioctl == KVM_SET_ONE_REG)
|
|
|
|
|
r = kvm_vcpu_ioctl_set_one_reg(vcpu, ®);
|
|
|
|
|
else
|
|
|
|
|
r = kvm_vcpu_ioctl_get_one_reg(vcpu, ®);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2012-02-15 23:40:00 +00:00
|
|
|
#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
|
2011-08-18 20:25:21 +00:00
|
|
|
case KVM_DIRTY_TLB: {
|
|
|
|
|
struct kvm_dirty_tlb dirty;
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (copy_from_user(&dirty, argp, sizeof(dirty)))
|
|
|
|
|
goto out;
|
|
|
|
|
r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2008-04-17 04:28:09 +00:00
|
|
|
default:
|
|
|
|
|
r = -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
out:
|
|
|
|
|
return r;
|
|
|
|
|
}
|
|
|
|
|
|
2012-01-04 09:25:23 +00:00
|
|
|
int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
|
|
|
|
|
{
|
|
|
|
|
return VM_FAULT_SIGBUS;
|
|
|
|
|
}
|
|
|
|
|
|
2010-07-29 12:48:08 +00:00
|
|
|
static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
|
|
|
|
|
{
|
|
|
|
|
u32 inst_lis = 0x3c000000;
|
|
|
|
|
u32 inst_ori = 0x60000000;
|
|
|
|
|
u32 inst_nop = 0x60000000;
|
|
|
|
|
u32 inst_sc = 0x44000002;
|
|
|
|
|
u32 inst_imm_mask = 0xffff;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* The hypercall to get into KVM from within guest context is as
|
|
|
|
|
* follows:
|
|
|
|
|
*
|
|
|
|
|
* lis r0, r0, KVM_SC_MAGIC_R0@h
|
|
|
|
|
* ori r0, KVM_SC_MAGIC_R0@l
|
|
|
|
|
* sc
|
|
|
|
|
* nop
|
|
|
|
|
*/
|
|
|
|
|
pvinfo->hcall[0] = inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask);
|
|
|
|
|
pvinfo->hcall[1] = inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask);
|
|
|
|
|
pvinfo->hcall[2] = inst_sc;
|
|
|
|
|
pvinfo->hcall[3] = inst_nop;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
long kvm_arch_vm_ioctl(struct file *filp,
|
|
|
|
|
unsigned int ioctl, unsigned long arg)
|
|
|
|
|
{
|
2010-07-29 12:48:08 +00:00
|
|
|
void __user *argp = (void __user *)arg;
|
2008-04-17 04:28:09 +00:00
|
|
|
long r;
|
|
|
|
|
|
|
|
|
|
switch (ioctl) {
|
2010-07-29 12:48:08 +00:00
|
|
|
case KVM_PPC_GET_PVINFO: {
|
|
|
|
|
struct kvm_ppc_pvinfo pvinfo;
|
2010-10-30 09:04:24 +00:00
|
|
|
memset(&pvinfo, 0, sizeof(pvinfo));
|
2010-07-29 12:48:08 +00:00
|
|
|
r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
|
|
|
|
|
if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
goto out;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
}
|
2012-03-15 21:58:34 +00:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
2011-06-29 00:22:41 +00:00
|
|
|
case KVM_CREATE_SPAPR_TCE: {
|
|
|
|
|
struct kvm_create_spapr_tce create_tce;
|
|
|
|
|
struct kvm *kvm = filp->private_data;
|
|
|
|
|
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
|
|
|
|
|
goto out;
|
|
|
|
|
r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce);
|
|
|
|
|
goto out;
|
|
|
|
|
}
|
2012-03-15 21:58:34 +00:00
|
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
KVM: PPC: Allocate RMAs (Real Mode Areas) at boot for use by guests
This adds infrastructure which will be needed to allow book3s_hv KVM to
run on older POWER processors, including PPC970, which don't support
the Virtual Real Mode Area (VRMA) facility, but only the Real Mode
Offset (RMO) facility. These processors require a physically
contiguous, aligned area of memory for each guest. When the guest does
an access in real mode (MMU off), the address is compared against a
limit value, and if it is lower, the address is ORed with an offset
value (from the Real Mode Offset Register (RMOR)) and the result becomes
the real address for the access. The size of the RMA has to be one of
a set of supported values, which usually includes 64MB, 128MB, 256MB
and some larger powers of 2.
Since we are unlikely to be able to allocate 64MB or more of physically
contiguous memory after the kernel has been running for a while, we
allocate a pool of RMAs at boot time using the bootmem allocator. The
size and number of the RMAs can be set using the kvm_rma_size=xx and
kvm_rma_count=xx kernel command line options.
KVM exports a new capability, KVM_CAP_PPC_RMA, to signal the availability
of the pool of preallocated RMAs. The capability value is 1 if the
processor can use an RMA but doesn't require one (because it supports
the VRMA facility), or 2 if the processor requires an RMA for each guest.
This adds a new ioctl, KVM_ALLOCATE_RMA, which allocates an RMA from the
pool and returns a file descriptor which can be used to map the RMA. It
also returns the size of the RMA in the argument structure.
Having an RMA means we will get multiple KMV_SET_USER_MEMORY_REGION
ioctl calls from userspace. To cope with this, we now preallocate the
kvm->arch.ram_pginfo array when the VM is created with a size sufficient
for up to 64GB of guest memory. Subsequently we will get rid of this
array and use memory associated with each memslot instead.
This moves most of the code that translates the user addresses into
host pfns (page frame numbers) out of kvmppc_prepare_vrma up one level
to kvmppc_core_prepare_memory_region. Also, instead of having to look
up the VMA for each page in order to check the page size, we now check
that the pages we get are compound pages of 16MB. However, if we are
adding memory that is mapped to an RMA, we don't bother with calling
get_user_pages_fast and instead just offset from the base pfn for the
RMA.
Typically the RMA gets added after vcpus are created, which makes it
inconvenient to have the LPCR (logical partition control register) value
in the vcpu->arch struct, since the LPCR controls whether the processor
uses RMA or VRMA for the guest. This moves the LPCR value into the
kvm->arch struct and arranges for the MER (mediated external request)
bit, which is the only bit that varies between vcpus, to be set in
assembly code when going into the guest if there is a pending external
interrupt request.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:25:44 +00:00
|
|
|
|
2012-03-15 21:58:34 +00:00
|
|
|
#ifdef CONFIG_KVM_BOOK3S_64_HV
|
KVM: PPC: Allocate RMAs (Real Mode Areas) at boot for use by guests
This adds infrastructure which will be needed to allow book3s_hv KVM to
run on older POWER processors, including PPC970, which don't support
the Virtual Real Mode Area (VRMA) facility, but only the Real Mode
Offset (RMO) facility. These processors require a physically
contiguous, aligned area of memory for each guest. When the guest does
an access in real mode (MMU off), the address is compared against a
limit value, and if it is lower, the address is ORed with an offset
value (from the Real Mode Offset Register (RMOR)) and the result becomes
the real address for the access. The size of the RMA has to be one of
a set of supported values, which usually includes 64MB, 128MB, 256MB
and some larger powers of 2.
Since we are unlikely to be able to allocate 64MB or more of physically
contiguous memory after the kernel has been running for a while, we
allocate a pool of RMAs at boot time using the bootmem allocator. The
size and number of the RMAs can be set using the kvm_rma_size=xx and
kvm_rma_count=xx kernel command line options.
KVM exports a new capability, KVM_CAP_PPC_RMA, to signal the availability
of the pool of preallocated RMAs. The capability value is 1 if the
processor can use an RMA but doesn't require one (because it supports
the VRMA facility), or 2 if the processor requires an RMA for each guest.
This adds a new ioctl, KVM_ALLOCATE_RMA, which allocates an RMA from the
pool and returns a file descriptor which can be used to map the RMA. It
also returns the size of the RMA in the argument structure.
Having an RMA means we will get multiple KMV_SET_USER_MEMORY_REGION
ioctl calls from userspace. To cope with this, we now preallocate the
kvm->arch.ram_pginfo array when the VM is created with a size sufficient
for up to 64GB of guest memory. Subsequently we will get rid of this
array and use memory associated with each memslot instead.
This moves most of the code that translates the user addresses into
host pfns (page frame numbers) out of kvmppc_prepare_vrma up one level
to kvmppc_core_prepare_memory_region. Also, instead of having to look
up the VMA for each page in order to check the page size, we now check
that the pages we get are compound pages of 16MB. However, if we are
adding memory that is mapped to an RMA, we don't bother with calling
get_user_pages_fast and instead just offset from the base pfn for the
RMA.
Typically the RMA gets added after vcpus are created, which makes it
inconvenient to have the LPCR (logical partition control register) value
in the vcpu->arch struct, since the LPCR controls whether the processor
uses RMA or VRMA for the guest. This moves the LPCR value into the
kvm->arch struct and arranges for the MER (mediated external request)
bit, which is the only bit that varies between vcpus, to be set in
assembly code when going into the guest if there is a pending external
interrupt request.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:25:44 +00:00
|
|
|
case KVM_ALLOCATE_RMA: {
|
|
|
|
|
struct kvm *kvm = filp->private_data;
|
|
|
|
|
struct kvm_allocate_rma rma;
|
|
|
|
|
|
|
|
|
|
r = kvm_vm_ioctl_allocate_rma(kvm, &rma);
|
|
|
|
|
if (r >= 0 && copy_to_user(argp, &rma, sizeof(rma)))
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
break;
|
|
|
|
|
}
|
KVM: PPC: Book3S HV: Make the guest hash table size configurable
This adds a new ioctl to enable userspace to control the size of the guest
hashed page table (HPT) and to clear it out when resetting the guest.
The KVM_PPC_ALLOCATE_HTAB ioctl is a VM ioctl and takes as its parameter
a pointer to a u32 containing the desired order of the HPT (log base 2
of the size in bytes), which is updated on successful return to the
actual order of the HPT which was allocated.
There must be no vcpus running at the time of this ioctl. To enforce
this, we now keep a count of the number of vcpus running in
kvm->arch.vcpus_running.
If the ioctl is called when a HPT has already been allocated, we don't
reallocate the HPT but just clear it out. We first clear the
kvm->arch.rma_setup_done flag, which has two effects: (a) since we hold
the kvm->lock mutex, it will prevent any vcpus from starting to run until
we're done, and (b) it means that the first vcpu to run after we're done
will re-establish the VRMA if necessary.
If userspace doesn't call this ioctl before running the first vcpu, the
kernel will allocate a default-sized HPT at that point. We do it then
rather than when creating the VM, as the code did previously, so that
userspace has a chance to do the ioctl if it wants.
When allocating the HPT, we can allocate either from the kernel page
allocator, or from the preallocated pool. If userspace is asking for
a different size from the preallocated HPTs, we first try to allocate
using the kernel page allocator. Then we try to allocate from the
preallocated pool, and then if that fails, we try allocating decreasing
sizes from the kernel page allocator, down to the minimum size allowed
(256kB). Note that the kernel page allocator limits allocations to
1 << CONFIG_FORCE_MAX_ZONEORDER pages, which by default corresponds to
16MB (on 64-bit powerpc, at least).
Signed-off-by: Paul Mackerras <paulus@samba.org>
[agraf: fix module compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-05-04 02:32:53 +00:00
|
|
|
|
|
|
|
|
case KVM_PPC_ALLOCATE_HTAB: {
|
|
|
|
|
struct kvm *kvm = filp->private_data;
|
|
|
|
|
u32 htab_order;
|
|
|
|
|
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (get_user(htab_order, (u32 __user *)argp))
|
|
|
|
|
break;
|
|
|
|
|
r = kvmppc_alloc_reset_hpt(kvm, &htab_order);
|
|
|
|
|
if (r)
|
|
|
|
|
break;
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
if (put_user(htab_order, (u32 __user *)argp))
|
|
|
|
|
break;
|
|
|
|
|
r = 0;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2011-06-29 00:22:41 +00:00
|
|
|
#endif /* CONFIG_KVM_BOOK3S_64_HV */
|
|
|
|
|
|
2012-04-26 19:43:42 +00:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
|
|
case KVM_PPC_GET_SMMU_INFO: {
|
|
|
|
|
struct kvm *kvm = filp->private_data;
|
|
|
|
|
struct kvm_ppc_smmu_info info;
|
|
|
|
|
|
|
|
|
|
memset(&info, 0, sizeof(info));
|
|
|
|
|
r = kvm_vm_ioctl_get_smmu_info(kvm, &info);
|
|
|
|
|
if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
|
|
|
|
|
r = -EFAULT;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
2008-04-17 04:28:09 +00:00
|
|
|
default:
|
2009-08-26 11:57:07 +00:00
|
|
|
r = -ENOTTY;
|
2008-04-17 04:28:09 +00:00
|
|
|
}
|
|
|
|
|
|
2010-07-29 12:48:08 +00:00
|
|
|
out:
|
2008-04-17 04:28:09 +00:00
|
|
|
return r;
|
|
|
|
|
}
|
|
|
|
|
|
2011-12-20 15:34:20 +00:00
|
|
|
static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
|
|
|
|
|
static unsigned long nr_lpids;
|
|
|
|
|
|
|
|
|
|
long kvmppc_alloc_lpid(void)
|
|
|
|
|
{
|
|
|
|
|
long lpid;
|
|
|
|
|
|
|
|
|
|
do {
|
|
|
|
|
lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
|
|
|
|
|
if (lpid >= nr_lpids) {
|
|
|
|
|
pr_err("%s: No LPIDs free\n", __func__);
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
}
|
|
|
|
|
} while (test_and_set_bit(lpid, lpid_inuse));
|
|
|
|
|
|
|
|
|
|
return lpid;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void kvmppc_claim_lpid(long lpid)
|
|
|
|
|
{
|
|
|
|
|
set_bit(lpid, lpid_inuse);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void kvmppc_free_lpid(long lpid)
|
|
|
|
|
{
|
|
|
|
|
clear_bit(lpid, lpid_inuse);
|
|
|
|
|
}
|
|
|
|
|
|
|
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void kvmppc_init_lpid(unsigned long nr_lpids_param)
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{
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nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
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memset(lpid_inuse, 0, sizeof(lpid_inuse));
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}
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2008-04-17 04:28:09 +00:00
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int kvm_arch_init(void *opaque)
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{
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return 0;
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}
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void kvm_arch_exit(void)
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{
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}
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