2010-04-26 17:13:05 +00:00
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#ifndef _ASM_X86_INTEL_SCU_IPC_H_
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#define _ASM_X86_INTEL_SCU_IPC_H_
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2010-06-01 12:07:34 +00:00
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#define IPCMSG_VRTC 0xFA /* Set vRTC device */
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/* Command id associated with message IPCMSG_VRTC */
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#define IPC_CMD_VRTC_SETTIME 1 /* Set time */
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#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
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2010-04-26 17:13:05 +00:00
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/* Read single register */
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int intel_scu_ipc_ioread8(u16 addr, u8 *data);
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/* Read two sequential registers */
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int intel_scu_ipc_ioread16(u16 addr, u16 *data);
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/* Read four sequential registers */
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int intel_scu_ipc_ioread32(u16 addr, u32 *data);
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/* Read a vector */
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int intel_scu_ipc_readv(u16 *addr, u8 *data, int len);
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/* Write single register */
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int intel_scu_ipc_iowrite8(u16 addr, u8 data);
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/* Write two sequential registers */
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int intel_scu_ipc_iowrite16(u16 addr, u16 data);
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/* Write four sequential registers */
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int intel_scu_ipc_iowrite32(u16 addr, u32 data);
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/* Write a vector */
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int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
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/* Update single register based on the mask */
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int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
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/* Issue commands to the SCU with or without data */
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int intel_scu_ipc_simple_command(int cmd, int sub);
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int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
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u32 *out, int outlen);
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/* I2C control api */
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int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data);
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/* Update FW version */
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int intel_scu_ipc_fw_update(u8 *buffer, u32 length);
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#endif
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