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https://github.com/FEX-Emu/linux.git
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140 lines
4.9 KiB
C
140 lines
4.9 KiB
C
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/*!**************************************************************************
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*!
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*! MACROS:
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*! IO_MASK(reg,field)
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*! IO_STATE(reg,field,state)
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*! IO_EXTRACT(reg,field,val)
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*! IO_STATE_VALUE(reg,field,state)
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*! IO_BITNR(reg,field)
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*! IO_WIDTH(reg,field)
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*! IO_FIELD(reg,field,val)
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*! IO_RD(reg)
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*! All moderegister addresses and fields of these.
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*!
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*!**************************************************************************/
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#ifndef __sv_addr_ag_h__
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#define __sv_addr_ag_h__
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#define __test_sv_addr__ 0
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/*------------------------------------------------------------
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!* General macros to manipulate moderegisters.
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!*-----------------------------------------------------------*/
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/* IO_MASK returns a mask for a specified bitfield in a register.
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Note that this macro doesn't work when field width is 32 bits. */
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#define IO_MASK(reg, field) IO_MASK_ (reg##_, field##_)
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#define IO_MASK_(reg_, field_) \
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( ( ( 1 << reg_##_##field_##_WIDTH ) - 1 ) << reg_##_##field_##_BITNR )
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/* IO_STATE returns a constant corresponding to a one of the symbolic
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states that the bitfield can have. (Shifted to correct position) */
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#define IO_STATE(reg, field, state) IO_STATE_ (reg##_, field##_, _##state)
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#define IO_STATE_(reg_, field_, _state) \
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( reg_##_##field_##_state << reg_##_##field_##_BITNR )
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/* IO_EXTRACT returns the masked and shifted value corresponding to the
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bitfield can have. */
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#define IO_EXTRACT(reg, field, val) IO_EXTRACT_ (reg##_, field##_, val)
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#define IO_EXTRACT_(reg_, field_, val) ( (( ( ( 1 << reg_##_##field_##_WIDTH ) \
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- 1 ) << reg_##_##field_##_BITNR ) & (val)) >> reg_##_##field_##_BITNR )
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/* IO_STATE_VALUE returns a constant corresponding to a one of the symbolic
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states that the bitfield can have. (Not shifted) */
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#define IO_STATE_VALUE(reg, field, state) \
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IO_STATE_VALUE_ (reg##_, field##_, _##state)
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#define IO_STATE_VALUE_(reg_, field_, _state) ( reg_##_##field_##_state )
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/* IO_FIELD shifts the val parameter to be aligned with the bitfield
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specified. */
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#define IO_FIELD(reg, field, val) IO_FIELD_ (reg##_, field##_, val)
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#define IO_FIELD_(reg_, field_, val) ((val) << reg_##_##field_##_BITNR)
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/* IO_BITNR returns the starting bitnumber of a bitfield. Bit 0 is
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LSB and the returned bitnumber is LSB of the field. */
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#define IO_BITNR(reg, field) IO_BITNR_ (reg##_, field##_)
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#define IO_BITNR_(reg_, field_) (reg_##_##field_##_BITNR)
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/* IO_WIDTH returns the width, in bits, of a bitfield. */
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#define IO_WIDTH(reg, field) IO_WIDTH_ (reg##_, field##_)
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#define IO_WIDTH_(reg_, field_) (reg_##_##field_##_WIDTH)
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/*--- Obsolete. Kept for backw compatibility. ---*/
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/* Reads (or writes) a byte/uword/udword from the specified mode
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register. */
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#define IO_RD(reg) (*(volatile u32*)(reg))
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#define IO_RD_B(reg) (*(volatile u8*)(reg))
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#define IO_RD_W(reg) (*(volatile u16*)(reg))
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#define IO_RD_D(reg) (*(volatile u32*)(reg))
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/*------------------------------------------------------------
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!* Start addresses of the different memory areas.
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!*-----------------------------------------------------------*/
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#define MEM_CSE0_START (0x00000000)
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#define MEM_CSE0_SIZE (0x04000000)
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#define MEM_CSE1_START (0x04000000)
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#define MEM_CSE1_SIZE (0x04000000)
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#define MEM_CSR0_START (0x08000000)
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#define MEM_CSR1_START (0x0c000000)
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#define MEM_CSP0_START (0x10000000)
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#define MEM_CSP1_START (0x14000000)
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#define MEM_CSP2_START (0x18000000)
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#define MEM_CSP3_START (0x1c000000)
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#define MEM_CSP4_START (0x20000000)
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#define MEM_CSP5_START (0x24000000)
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#define MEM_CSP6_START (0x28000000)
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#define MEM_CSP7_START (0x2c000000)
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#define MEM_DRAM_START (0x40000000)
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#define MEM_NON_CACHEABLE (0x80000000)
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/*------------------------------------------------------------
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!* Type casts used in mode register macros, making pointer
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!* dereferencing possible. Empty in assembler.
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!*-----------------------------------------------------------*/
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#ifndef __ASSEMBLER__
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# define IO_TYPECAST_UDWORD (volatile u32*)
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# define IO_TYPECAST_RO_UDWORD (const volatile u32*)
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# define IO_TYPECAST_UWORD (volatile u16*)
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# define IO_TYPECAST_RO_UWORD (const volatile u16*)
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# define IO_TYPECAST_BYTE (volatile u8*)
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# define IO_TYPECAST_RO_BYTE (const volatile u8*)
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#else
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# define IO_TYPECAST_UDWORD
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# define IO_TYPECAST_RO_UDWORD
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# define IO_TYPECAST_UWORD
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# define IO_TYPECAST_RO_UWORD
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# define IO_TYPECAST_BYTE
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# define IO_TYPECAST_RO_BYTE
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#endif
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/*------------------------------------------------------------*/
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#include "sv_addr.agh"
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#if __test_sv_addr__
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/* IO_MASK( R_BUS_CONFIG , CE ) */
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IO_MASK( R_WAITSTATES , SRAM_WS )
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IO_MASK( R_TEST , W32 )
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IO_STATE( R_BUS_CONFIG, CE, DISABLE )
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IO_STATE( R_BUS_CONFIG, CE, ENABLE )
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IO_STATE( R_DRAM_TIMING, REF, IVAL2 )
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IO_MASK( R_DRAM_TIMING, REF )
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IO_MASK( R_EXT_DMA_0_STAT, TFR_COUNT ) >> IO_BITNR( R_EXT_DMA_0_STAT, TFR_COUNT )
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IO_RD(R_EXT_DMA_0_STAT) & IO_MASK( R_EXT_DMA_0_STAT, S )
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== IO_STATE( R_EXT_DMA_0_STAT, S, STARTED )
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#endif
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#endif /* ifndef __sv_addr_ag_h__ */
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