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104 lines
2.3 KiB
Plaintext
104 lines
2.3 KiB
Plaintext
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/*
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* SAMSUNG EXYNOS5420 SoC device tree source
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*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* SAMSUNG EXYNOS54200 SoC device nodes are listed in this file.
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* EXYNOS5420 based board files can include this file and provide
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* values for board specfic bindings.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "exynos5.dtsi"
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/ {
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compatible = "samsung,exynos5420";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x0>;
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clock-frequency = <1800000000>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x1>;
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clock-frequency = <1800000000>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x2>;
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clock-frequency = <1800000000>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x3>;
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clock-frequency = <1800000000>;
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};
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};
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clock: clock-controller@0x10010000 {
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compatible = "samsung,exynos5420-clock";
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reg = <0x10010000 0x30000>;
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#clock-cells = <1>;
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};
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mct@101C0000 {
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compatible = "samsung,exynos4210-mct";
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reg = <0x101C0000 0x800>;
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interrupt-controller;
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#interrups-cells = <1>;
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interrupt-parent = <&mct_map>;
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interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>;
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clocks = <&clock 1>, <&clock 315>;
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clock-names = "fin_pll", "mct";
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mct_map: mct-map {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = <0 &combiner 23 3>,
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<1 &combiner 23 4>,
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<2 &combiner 25 2>,
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<3 &combiner 25 3>,
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<4 &gic 0 120 0>,
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<5 &gic 0 121 0>,
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<6 &gic 0 122 0>,
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<7 &gic 0 123 0>;
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};
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};
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serial@12C00000 {
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clocks = <&clock 257>, <&clock 128>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C10000 {
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clocks = <&clock 258>, <&clock 129>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C20000 {
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clocks = <&clock 259>, <&clock 130>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C30000 {
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clocks = <&clock 260>, <&clock 131>;
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clock-names = "uart", "clk_uart_baud0";
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};
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};
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