mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-26 11:28:28 +00:00
x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration
Remove the irqoff/irqon around MSR-based TSC enumeration, as it is not necessary. Also rename: try_msr_calibrate_tsc() to cpu_khz_from_msr(), as that better describes what the routine does. Signed-off-by: Len Brown <len.brown@intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/a6b5c3ecd3b068175d2309599ab28163fc34215e.1466138954.git.len.brown@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
parent
6fcb41cdae
commit
02c0cd2dcf
@ -52,7 +52,6 @@ extern int notsc_setup(char *);
|
||||
extern void tsc_save_sched_clock_state(void);
|
||||
extern void tsc_restore_sched_clock_state(void);
|
||||
|
||||
/* MSR based TSC calibration for Intel Atom SoC platforms */
|
||||
unsigned long try_msr_calibrate_tsc(void);
|
||||
unsigned long cpu_khz_from_msr(void);
|
||||
|
||||
#endif /* _ASM_X86_TSC_H */
|
||||
|
@ -674,10 +674,7 @@ unsigned long native_calibrate_tsc(void)
|
||||
unsigned long flags, latch, ms, fast_calibrate;
|
||||
int hpet = is_hpet_enabled(), i, loopmin;
|
||||
|
||||
/* Calibrate TSC using MSR for Intel Atom SoCs */
|
||||
local_irq_save(flags);
|
||||
fast_calibrate = try_msr_calibrate_tsc();
|
||||
local_irq_restore(flags);
|
||||
fast_calibrate = cpu_khz_from_msr();
|
||||
if (fast_calibrate)
|
||||
return fast_calibrate;
|
||||
|
||||
|
@ -68,7 +68,7 @@ static int match_cpu(u8 family, u8 model)
|
||||
* Set global "lapic_timer_frequency" to bus_clock_cycles/jiffy
|
||||
* Return processor base frequency in KHz, or 0 on failure.
|
||||
*/
|
||||
unsigned long try_msr_calibrate_tsc(void)
|
||||
unsigned long cpu_khz_from_msr(void)
|
||||
{
|
||||
u32 lo, hi, ratio, freq_id, freq;
|
||||
unsigned long res;
|
||||
|
Loading…
Reference in New Issue
Block a user