am33xx specific updates for restart and revision detection.

Also get rid of OMAP_32K_TIMER_HZ as that no longer is needed.
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Merge tag 'omap-for-v3.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/omap

From Tony Lindgren:
am33xx specific updates for restart and revision detection.
Also get rid of OMAP_32K_TIMER_HZ as that no longer is needed.

* tag 'omap-for-v3.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2: AM33XX: id: Add support for AM335x PG2.0
  ARM: OMAP2+: Get rid of custom OMAP_32K_TIMER_HZ
  ARM: OMAP2+: AM33xx: Add SoC specific restart hook
This commit is contained in:
Olof Johansson 2013-02-12 15:31:57 -08:00
commit 02ea21331e
9 changed files with 57 additions and 20 deletions

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@ -1650,7 +1650,6 @@ config HZ
int
default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
ARCH_S5PV210 || ARCH_EXYNOS4
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
default 100

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@ -53,6 +53,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
# Restart code (OMAP4/5 currently in omap4-common.c)
obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o
obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o
obj-$(CONFIG_SOC_AM33XX) += am33xx-restart.o
obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
# Pin multiplexing

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@ -0,0 +1,34 @@
/*
* am33xx-restart.c - Code common to all AM33xx machines.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include "common.h"
#include "prm-regbits-33xx.h"
#include "prm33xx.h"
/**
* am3xx_restart - trigger a software restart of the SoC
* @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
* @cmd: passed from the userspace program rebooting the system (if provided)
*
* Resets the SoC. For @cmd, see the 'reboot' syscall in
* kernel/sys.c. No return value.
*/
void am33xx_restart(char mode, const char *cmd)
{
/* TODO: Handle mode and cmd if necessary */
am33xx_prm_rmw_reg_bits(AM33XX_GLOBAL_WARM_SW_RST_MASK,
AM33XX_GLOBAL_WARM_SW_RST_MASK,
AM33XX_PRM_DEVICE_MOD,
AM33XX_PRM_RSTCTRL_OFFSET);
/* OCP barrier */
(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
AM33XX_PRM_RSTCTRL_OFFSET);
}

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@ -141,6 +141,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
.init_machine = omap_generic_init,
.timer = &omap3_am33xx_timer,
.dt_compat = am33xx_boards_compat,
.restart = am33xx_restart,
MACHINE_END
#endif

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@ -119,6 +119,14 @@ static inline void omap2xxx_restart(char mode, const char *cmd)
}
#endif
#ifdef CONFIG_SOC_AM33XX
void am33xx_restart(char mode, const char *cmd);
#else
static inline void am33xx_restart(char mode, const char *cmd)
{
}
#endif
#ifdef CONFIG_ARCH_OMAP3
void omap3xxx_restart(char mode, const char *cmd);
#else

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@ -399,8 +399,18 @@ void __init omap3xxx_check_revision(void)
}
break;
case 0xb944:
omap_revision = AM335X_REV_ES1_0;
cpu_rev = "1.0";
switch (rev) {
case 0:
omap_revision = AM335X_REV_ES1_0;
cpu_rev = "1.0";
break;
case 1:
/* FALLTHROUGH */
default:
omap_revision = AM335X_REV_ES2_0;
cpu_rev = "2.0";
break;
}
break;
case 0xb8f2:
switch (rev) {

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@ -387,6 +387,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define AM335X_CLASS 0x33500033
#define AM335X_REV_ES1_0 AM335X_CLASS
#define AM335X_REV_ES2_0 (AM335X_CLASS | (0x1 << 8))
#define OMAP443X_CLASS 0x44300044
#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))

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@ -177,15 +177,6 @@ config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
help
PPA routine service ID for setting L2 auxiliary control register.
config OMAP_32K_TIMER_HZ
int "Kernel internal timer frequency for 32KHz timer"
range 32 1024
depends on OMAP_32K_TIMER
default "128"
help
Kernel internal timer frequency should be a divisor of 32768,
such as 64 or 128.
config OMAP_DM_TIMER
bool "Use dual-mode timer"
depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS

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@ -28,14 +28,6 @@
#if !defined(__ASM_ARCH_OMAP_TIMEX_H)
#define __ASM_ARCH_OMAP_TIMEX_H
/*
* OMAP 32KHz timer updates time one jiffie at a time from a secondary timer,
* and that's why the CLOCK_TICK_RATE is not 32768.
*/
#ifdef CONFIG_OMAP_32K_TIMER
#define CLOCK_TICK_RATE (CONFIG_OMAP_32K_TIMER_HZ)
#else
#define CLOCK_TICK_RATE (HZ * 100000UL)
#endif
#endif /* __ASM_ARCH_OMAP_TIMEX_H */