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clk/samsung: exynos5433: add pclk_decon clock

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This undocumented gate clock is used by DECON IP.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Andrzej Hajda 2015-10-20 11:22:33 +02:00 committed by Sylwester Nawrocki
parent 68b2206a57
commit 02ed910cb4
2 changed files with 5 additions and 1 deletions
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2
drivers/clk/samsung/clk-exynos5433.c
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@ -2822,6 +2822,8 @@ static struct samsung_gate_clock disp_gate_clks[] __initdata = {
ENABLE_PCLK_DISP, 2, 0, 0), ENABLE_PCLK_DISP, 2, 0, 0),
GATE(CLK_PCLK_DECON_TV, "pclk_decon_tv", "div_pclk_disp", GATE(CLK_PCLK_DECON_TV, "pclk_decon_tv", "div_pclk_disp",
ENABLE_PCLK_DISP, 1, 0, 0), ENABLE_PCLK_DISP, 1, 0, 0),
GATE(CLK_PCLK_DECON, "pclk_decon", "div_pclk_disp",
ENABLE_PCLK_DISP, 0, 0, 0),
/* ENABLE_SCLK_DISP */ /* ENABLE_SCLK_DISP */
GATE(CLK_PHYCLK_MIPIDPHY1_BITCLKDIV8, "phyclk_mipidphy1_bitclkdiv8", GATE(CLK_PHYCLK_MIPIDPHY1_BITCLKDIV8, "phyclk_mipidphy1_bitclkdiv8",

4
include/dt-bindings/clock/exynos5433.h
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@ -768,7 +768,9 @@
#define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY 111 #define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY 111
#define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY 112 #define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY 112
#define DISP_NR_CLK 113 #define CLK_PCLK_DECON 113
#define DISP_NR_CLK 114
/* CMU_AUD */ /* CMU_AUD */
#define CLK_MOUT_AUD_PLL_USER 1 #define CLK_MOUT_AUD_PLL_USER 1