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MIPS: Don't read GCRs when a CM is not present

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Commit 3885c2b463f6 ("MIPS: CM: Add support for reporting CM cache
errors") leads to Malta boards unconditionally reading CM GCRs upon bus
errors, regardless of whether a CM is present. This is incorrect & will
lead to further exceptions. Fix by moving the GCR reads to after the
check for whether a CM is present.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11186/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2015-09-22 10:26:38 -07:00 committed by Ralf Baechle
parent 7784494ae7
commit 03b1b85d3d
1 changed files with 10 additions and 7 deletions
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17
arch/mips/kernel/mips-cm.c
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@ -252,7 +252,6 @@ int mips_cm_probe(void)
void mips_cm_error_report(void)
{
unsigned long revision = mips_cm_revision();
/*
* CM3 has a 64-bit Error cause register with 0:57 containing the error
* info and 63:58 the error type. For old CMs, everything is contained
@ -260,17 +259,21 @@ void mips_cm_error_report(void)
* though the cm_error is u64, we will simply ignore the upper word
* for CM2.
*/
u64 cm_error = read_gcr_error_cause();
int cm_error_cause_sft = CM_GCR_ERROR_CAUSE_ERRTYPE_SHF +
((revision >= CM_REV_CM3) ? 31 : 0);
unsigned long cm_addr = read_gcr_error_addr();
unsigned long cm_other = read_gcr_error_mult();
int ocause, cause;
u64 cm_error;
unsigned long revision, cm_addr, cm_other;
int ocause, cause, cm_error_cause_sft;
char buf[256];
if (!mips_cm_present())
return;
revision = mips_cm_revision();
cm_error = read_gcr_error_cause();
cm_addr = read_gcr_error_addr();
cm_other = read_gcr_error_mult();
cm_error_cause_sft = CM_GCR_ERROR_CAUSE_ERRTYPE_SHF +
((revision >= CM_REV_CM3) ? 31 : 0);
cause = cm_error >> cm_error_cause_sft;
if (!cause)